search for: cmp_swap

...o say 'output = the first subreg for input or output = input' in pattern constraints. 2.) I think these will need SLC bit set to work correctly on HSA targets. I'm not sure what the best way is to do this. I considered: * adding it as an operand to the newly introduced node (AMDGPUISD::CMP_SWAP), and setting it to 0/1 in Lowering pass. Can this be done without changing order of the inputs? slc is always the last but the count is variable * introducing HSA variants of the instructions with SLC bit set * setting the bit in DAG combine (is there a way to know if I'm combining atomic op,...

...irst subreg for input or output = input' in pattern constraints. > > 2.) I think these will need SLC bit set to work correctly on HSA > targets. I'm not sure what the best way is to do this. I considered: > * adding it as an operand to the newly introduced node > (AMDGPUISD::CMP_SWAP), and setting it to 0/1 in Lowering pass. Can this > be done without changing order of the inputs? slc is always the last > but the count is variable > * introducing HSA variants of the instructions with SLC bit set > * setting the bit in DAG combine (is there a way to know if I'm &...