Displaying 6 results from an estimated 6 matches for "cmp16".
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2013 Jan 21
2
[LLVMdev] introducing sign extending halfword loads into the LLVM IR
...omparison implementing the val>-2048, resulting in a 16-bit comparison on the non-extended value; the result is a comparison operation on 16-bit operands, followed by a select operation on 32-bit operands:
%0 = load i16* %arrayidx2, align 2, !dbg !502
%conv = sext i16 %0 to i32, !dbg !502
%cmp16 = icmp sgt i16 %0, 2047, !dbg !510
br i1 %cmp16, label %if.end23, label %if.else, !dbg !510
if.else: ; preds = %for.body
%cmp19 = icmp slt i16 %0, -2048, !dbg !511 <--- 16-bit comparison
%.conv = select i1 %cm...
2013 Jan 21
0
[LLVMdev] introducing sign extending halfword loads into the LLVM IR
...l>-2048, resulting in a 16-bit comparison on the
> non-extended value; the result is a comparison operation on 16-bit
> operands, followed by a select operation on 32-bit operands:
>
> %0 = load i16* %arrayidx2, align 2, !dbg !502
> %conv = sext i16 %0 to i32, !dbg !502
> %cmp16 = icmp sgt i16 %0, 2047, !dbg !510
> br i1 %cmp16, label %if.end23, label %if.else, !dbg !510
>
> if.else: ; preds = %for.body
> %cmp19 = icmp slt i16 %0, -2048, !dbg !511
> <--- 16-bit comparison
> %.conv = select i1 %cmp...
2013 Jan 21
2
[LLVMdev] introducing sign extending halfword loads into the LLVM IR
...ng the val>-2048, resulting in a 16-bit comparison on the non-extended value; the result is a comparison operation on 16-bit operands, followed by a select operation on 32-bit operands:
>
> %0 = load i16* %arrayidx2, align 2, !dbg !502
> %conv = sext i16 %0 to i32, !dbg !502
> %cmp16 = icmp sgt i16 %0, 2047, !dbg !510
> br i1 %cmp16, label %if.end23, label %if.else, !dbg !510
>
> if.else: ; preds = %for.body
> %cmp19 = icmp slt i16 %0, -2048, !dbg !511 <--- 16-bit comparison
>...
2013 Jan 21
3
[LLVMdev] introducing sign extending halfword loads into the LLVM IR
...048, resulting in a 16-bit comparison on the non-extended value; the result is a comparison operation on 16-bit operands, followed by a select operation on 32-bit operands:
>>
>> %0 = load i16* %arrayidx2, align 2, !dbg !502
>> %conv = sext i16 %0 to i32, !dbg !502
>> %cmp16 = icmp sgt i16 %0, 2047, !dbg !510
>> br i1 %cmp16, label %if.end23, label %if.else, !dbg !510
>>
>> if.else: ; preds = %for.body
>> %cmp19 = icmp slt i16 %0, -2048, !dbg !511 <--- 16-bit...
2013 Jan 21
0
[LLVMdev] introducing sign extending halfword loads into the LLVM IR
...a 16-bit comparison on the
>> non-extended value; the result is a comparison operation on 16-bit
>> operands, followed by a select operation on 32-bit operands:
>>
>> %0 = load i16* %arrayidx2, align 2, !dbg !502
>> %conv = sext i16 %0 to i32, !dbg !502
>> %cmp16 = icmp sgt i16 %0, 2047, !dbg !510
>> br i1 %cmp16, label %if.end23, label %if.else, !dbg !510
>>
>> if.else: ; preds = %for.body
>> %cmp19 = icmp slt i16 %0, -2048, !dbg !511
>> <--- 16-bit comparison
>>...
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...%. = xor i32 %14, 1
store i32 %., i32* %sign, align 4
%cmp = icmp eq i32 %mode, 3
%not.cmp = xor i1 %cmp, true
%sub = sext i1 %not.cmp to i32
%ndigits.addr.0 = add nsw i32 %sub, %ndigits
%cmp13 = icmp eq i32 %mode, 0
%.ndigits.addr.0 = select i1 %cmp13, i32 20, i32 %ndigits.addr.0
%cmp16 = icmp sgt i32 %.ndigits.addr.0, 42
%ndigits.addr.2 = select i1 %cmp16, i32 42, i32 %.ndigits.addr.0
%arraydecay20 = getelementptr inbounds [57 x i8]* %outbuf, i32 0, i32 0
%15 = bitcast [13 x i16]* %y.i to i8*
call void @llvm.lifetime.start(i64 -1, i8* %15) nounwind
%16 = bitcast [13 x i...