search for: cmovne

...int t; t = a; a = b; b = c; c = t; } This is the resulting x86 assembly code: movss xmm0,dword ptr [ecx+4] ucomiss xmm0,dword ptr [ecx+8] sete al setnp dl test dl,al mov edx,edi cmovne edx,ecx cmovne ecx,esi cmovne esi,edi While I'm pleasantly surprised that my branch does get turned into several select operations as intended (cmov - conditional move - in x86), I'm confused why it uses the ucomiss instruction (unordered compare and set flags). I onl...

...code below is IEEE correct...you want to generate 'fcmp ueq' instead of 'fcmp oqe' This is the resulting x86 assembly code: movss xmm0,dword ptr [ecx+4] ucomiss xmm0,dword ptr [ecx+8] sete al setnp dl test dl,al mov edx,edi cmovne edx,ecx cmovne ecx,esi cmovne esi,edi While I'm pleasantly surprised that my branch does get turned into several select operations as intended (cmov - conditional move - in x86), I'm confused why it uses the ucomiss instruction (unordered compare and set flags). I onl...

...code below is IEEE correct...you want to generate 'fcmp ueq' instead of 'fcmp oqe' This is the resulting x86 assembly code: movss xmm0,dword ptr [ecx+4] ucomiss xmm0,dword ptr [ecx+8] sete al setnp dl test dl,al mov edx,edi cmovne edx,ecx cmovne ecx,esi cmovne esi,edi While I'm pleasantly surprised that my branch does get turned into several select operations as intended (cmov - conditional move - in x86), I'm confused why it uses the ucomiss instruction (unordered compare and set flags). I onl...

...code below is IEEE correct...you want to generate 'fcmp ueq' instead of 'fcmp oqe' This is the resulting x86 assembly code: movss xmm0,dword ptr [ecx+4] ucomiss xmm0,dword ptr [ecx+8] sete al setnp dl test dl,al mov edx,edi cmovne edx,ecx cmovne ecx,esi cmovne esi,edi While I'm pleasantly surprised that my branch does get turned into several select operations as intended (cmov - conditional move - in x86), I'm confused why it uses the ucomiss instruction (unordered compare and set flags). I onl...

...me ​now ​ in reverse order. 35d: 81 c9 08 04 00 00 or $0x408,%ecx 363: 89 4c 24 28 mov %ecx,0x28(%esp) 367: 89 df mov %ebx,%edi 369: 83 e7 10 ​ ​ and $0x10,%edi 36c: 89 7c 24 20 mov %edi,0x20(%esp) 370: 0f 45 d1 ​ ​ cmovne %ecx,%edx 373: 89 d7 mov %edx,%edi 375: 81 cf 10 08 00 00 or $0x810,%edi 37b: 89 7c 24 14 mov %edi,0x14(%esp) 37f: 89 d9 mov %ebx,%ecx 381: 83 e1 20 ​ ​ and $0x20,%ecx 384: 89 4c 24 1c mov %ecx,0x1c(%esp) 388: 0...

...efers the first case: b(int): mov eax, OFFSET FLAT:.LC0 test edi, edi jne .L7 ret But Clang seems to ignore _builtin_expect hints in this case. b(int): # @b(int) cmp edi, 1 mov eax, offset .L.str.1 mov ecx, offset .L.str.2 cmove rcx, rax test edi, edi mov eax, offset .L.str cmovne rax, rcx ret https://godbolt.org/g/tuAVT7 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180509/2e5eaa99/attachment.html>

I have optimized FLAC__fixed_compute_best_predictor_asm_ia32_mmx_cmov function and fixed bug when data_len == 0. Now the function is about 50% faster and flac -5 is about 5% faster on my box. I have tested it thoroughly, I think it can go to flac 1.0.4. -- Miroslav Lichvar -------------- next part -------------- --- src/libFLAC/ia32/fixed_asm.nasm.orig 2002-01-26 19:05:12.000000000 +0100 +++

...(0x0034fde8) 28 0x7bc395d5 in ntdll (+0x295d5) (0x0034fe28) 29 0x7bc3c5ca LdrInitializeThunk+0x372() in ntdll (0x0034ff08) 30 0x7b86d60b in kernel32 (+0x4d60b) (0x0034ffe8) 31 0xb7e9d3b7 wine_switch_to_stack+0x17() in libwine.so.1 (0x00000000) 0x7e8e34ef glXCreateContext+0x1f in libgl.so.1: cmovne %ecx,%ebx Modules: Module Address Debug info Name (42 modules) ELF 7b800000-7b919000 Export kernel32<elf> \-PE 7b820000-7b919000 \ kernel32 ELF 7bc00000-7bc81000 Export ntdll<elf> \-PE 7bc10000-7bc810...

...downloaded just a few days ago): gcc : 5.1 clang/llvm: clang+llvm-3.6.1-x86_64-apple-darwin Host: osx yosemite. The assembly (cut to the essential): LLVM: pushq %rbp movq %rsp, %rbp pushq %r14 pushq %rbx movl %edi, %r14d leal 71(%r14), %eax xorl %ecx, %ecx cmpl $56, %eax movl $92, %ebx cmovnel %ecx, %ebx leaq L_.str(%rip), %rdi callq _puts leal 71(%rbx,%r14), %eax popq %rbx popq %r14 popq %rbp retq and the gcc one: pushq %rbp movl $0, %eax movl $92, %ebp pushq %rbx leal 71(%rdi), %ebx leaq LC1(%rip), %rdi subq $8, %rsp cmpl $56, %ebx cmovne %eax, %ebp call _put...

...n `ind` equals to zero. Is this kind of optimization already implemented somewhere in LLVM? If not, what is the best place to implement it at? Thank you very much in advance. Best, Alex -------------------------- GCC x86 ASM: testl %edi, %edi movl $0, %edx movl $arr, %eax cmovne %rdx, %rax ret LLVM x86 ASM: xorl %eax, %eax testl %edi, %edi movl %edi, %ecx leaq arr(%rcx), %rcx cmoveq %rcx, %rax retq -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180228/0d...

...t; >> But Clang seems to ignore _builtin_expect hints in this case. >> >> b(int): # @b(int) >> cmp edi, 1 >> mov eax, offset .L.str.1 >> mov ecx, offset .L.str.2 >> cmove rcx, rax >> test edi, edi >> mov eax, offset .L.str >> cmovne rax, rcx >> ret >> >> https://godbolt.org/g/tuAVT7 >> >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >> >> >&...

...t >> >> But Clang seems to ignore _builtin_expect hints in this case. >> b(int): # @b(int) >> cmp edi, 1 >> mov eax, offset .L.str.1 >> mov ecx, offset .L.str.2 >> cmove rcx, rax >> test edi, edi >> mov eax, offset .L.str >> cmovne rax, rcx >> ret >> https://godbolt.org/g/tuAVT7 <https://godbolt.org/g/tuAVT7>_______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> >> http://lists.llvm.org/cgi-bi...

Hi @ll, while clang/LLVM recognizes common bit-twiddling idioms/expressions like unsigned int rotate(unsigned int x, unsigned int n) { return (x << n) | (x >> (32 - n)); } and typically generates "rotate" machine instructions for this expression, it fails to recognize other also common bit-twiddling idioms/expressions. The standard IEEE CRC-32 for "big

Maybe adjust this to be different for –Os, -Oz than for –O2? Kevin Smith From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of James Molloy via llvm-dev Sent: Friday, November 20, 2015 4:05 PM To: Steve King <steve at metrokings.com>; Renato Golin <renato.golin at linaro.org> Cc: llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Recent -Os code

"Sanjay Patel" <spatel at rotateright.com> wrote: > IIUC, you want to use x86-specific bit-hacks (sbb masking) in cases like > this: > unsigned int foo(unsigned int crc) { > if (crc & 0x80000000) > crc <<= 1, crc ^= 0xEDB88320; > else > crc <<= 1; > return crc; > } To document this for x86 too: rewrite the function

...e _builtin_expect hints in this case. >>> >>> b(int): # @b(int) >>> cmp edi, 1 >>> mov eax, offset .L.str.1 >>> mov ecx, offset .L.str.2 >>> cmove rcx, rax >>> test edi, edi >>> mov eax, offset .L.str >>> cmovne rax, rcx >>> ret >>> >>> https://godbolt.org/g/tuAVT7 >>> >>> _______________________________________________ >>> LLVM Developers mailing list >>> llvm-dev at lists.llvm.org >>> http://lists.llvm.org/cgi-bin/mailman/listinfo/...

...mov (%ecx),%eax Code; c01fc7cb <ipt_psd_match+cb/400> 7: 46 inc %esi Code; c01fc7cc <ipt_psd_match+cc/400> 8: 85 c0 test %eax,%eax Code; c01fc7ce <ipt_psd_match+ce/400> a: 0f 45 d1 cmovne %ecx,%edx Code; c01fc7d1 <ipt_psd_match+d1/400> d: 89 c1 mov %eax,%ecx Code; c01fc7d3 <ipt_psd_match+d3/400> f: 85 c9 test %ecx,%ecx Code; c01fc7d5 <ipt_psd_match+d5/400> 11: 75 e9 jne fffffffc &l...

...ll or barrier: 0000000000400400 <main>: 400400: 8b 05 4a 0c 20 00 mov 0x200c4a(%rip),%eax # 601050 <x> 400406: ba ff ff ff ff mov $0xffffffff,%edx 40040b: 83 f8 01 cmp $0x1,%eax 40040e: 0f 45 c2 cmovne %edx,%eax 400411: c3 retq ~Maarten

Hey, On 25-02-15 18:05, Ilia Mirkin wrote: > On Wed, Feb 25, 2015 at 11:59 AM, Patrick Baggett > <baggett.patrick at gmail.com> wrote: >>> If code like >>> >>> x = *a; >>> pthread_mutex_lock or unlock or __memory_barrier() >>> y = *a; >>> >>> doesn't cause a to get loaded twice, then the compiler's in serious

I'm trying to run the example described at: http://llvm.org/docs/DebuggingJITedCode.html I followed the sample command line session (below, with versions numbers for everything), but gdb doesn't stop at the breakpoints as described. Any idea what is wrong? Thanks, Zach zdevito at derp:~/terra/tests$ > ~/clang+llvm-3.4-x86_64-unknown-ubuntu12.04/bin/clang -cc1 -O0 -g >