search for: cmov_gr8

Displaying 6 results from an estimated 6 matches for "cmov_gr8".

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2009 Dec 11
0
[LLVMdev] Using branches in lowered operations
See X86InstrInfo.td let usesCustomInserter = 1, isTwoAddress = 0, Defs = [EFLAGS] in def CMOV_GR8 : I<0, Pseudo, This creates a CMOV_GR8 pseudo instruction at isel time which can be expanded during scheduling time. Evan On Dec 10, 2009, at 11:46 AM, Javier Martinez wrote: > Hello, > > My expansion for an operation uses if and loops. How do I introduce > branches in the targe...
2009 Dec 10
2
[LLVMdev] Using branches in lowered operations
Hello, My expansion for an operation uses if and loops. How do I introduce branches in the target lowering stage? Do I have to create basic blocks, add the instructions to them and and add them to the machine function's basic block list? Thanks, Javier
2011 Jun 05
1
[LLVMdev] MachineSink and EFLAGS
...gt; = AND8ri %vreg0, 127, %EFLAGS<imp-def,dead>; GR8:%vreg1,%vreg0 > %vreg2<def> = OR8ri %vreg0, -128, %EFLAGS<imp-def,dead>; GR8:%vreg2,%vreg0 > CMP8mi <fi#-1>, 1, %noreg, 0, %noreg, 0, %EFLAGS<imp-def>; mem:LD1[FixedStack-1](align=8) > %vreg3<def> = CMOV_GR8 %vreg2<kill>, %vreg1<kill>, 4, %EFLAGS<imp-def,dead>, %EFLAGS<imp-use>; GR8:%vreg3,%vreg2,%vreg1 > %vreg4<def> = MOVZX32rr8 %vreg3<kill>; GR32:%vreg4 GR8:%vreg3 > %EAX<def> = COPY %vreg4; GR32:%vreg4 > RET > > CMOV_GR8 instruction has EFL...
2011 Jun 05
0
[LLVMdev] MachineSink and EFLAGS
...%vreg1<def> = AND8ri %vreg0, 127, %EFLAGS<imp-def,dead>; GR8:%vreg1,%vreg0 %vreg2<def> = OR8ri %vreg0, -128, %EFLAGS<imp-def,dead>; GR8:%vreg2,%vreg0 CMP8mi <fi#-1>, 1, %noreg, 0, %noreg, 0, %EFLAGS<imp-def>; mem:LD1[FixedStack-1](align=8) %vreg3<def> = CMOV_GR8 %vreg2<kill>, %vreg1<kill>, 4, %EFLAGS<imp-def,dead>, %EFLAGS<imp-use>; GR8:%vreg3,%vreg2,%vreg1 %vreg4<def> = MOVZX32rr8 %vreg3<kill>; GR32:%vreg4 GR8:%vreg3 %EAX<def> = COPY %vreg4; GR32:%vreg4 RET CMOV_GR8 instruction has EFLAGS use which is not mark...
2011 Jun 03
2
[LLVMdev] MachineSink and EFLAGS
On Jun 3, 2011, at 2:59 AM, Galanov, Sergey wrote: > Hi, Bill and Jakob. > > I don't quite understand. I am talking about CMOV_GR* instructions which are conservatively marked as clobbering EFLAGS in X86InstrCompiler.td. Doesn't that mean there cannot be any use of EFLAGS in subsequent instructions before it is defined by some other instruction? > > I also don't
2009 Dec 16
1
[LLVMdev] Using branches in lowered operations
...sion that unfortunately uses branches for a target that doesn't support 64-bit integers. Thanks, Javier On Thu, 10 Dec 2009 22:52:12 -0800, Evan Cheng <evan.cheng at apple.com> wrote: > See X86InstrInfo.td > let usesCustomInserter = 1, isTwoAddress = 0, Defs = [EFLAGS] in > def CMOV_GR8 : I<0, Pseudo, > > This creates a CMOV_GR8 pseudo instruction at isel time which can be > expanded during scheduling time. > > Evan > > On Dec 10, 2009, at 11:46 AM, Javier Martinez wrote: > >> Hello, >> >> My expansion for an operation uses if and...