search for: cmci

Hi, All Following 4 patches are for enabling CMCI of Intel CPUs in XEN. --------------------------------------------------------------------------- Patch 1: remove_intel_mce_old.patch is to remove old p4/p6 files. The reason is that machine check architecture for Intel families including p4/p6/latest are similar. We need not keep duplicated codes....

Hi all, Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error. I am not sure why so many CMCI happened , maybe ther...

Hi all, Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error. I am not sure why so many CMCI happened , maybe ther...

Hi, all Patch3: Enable CMCI for Intel CPUs -- main patch for CMCI support This patch is the main patch for CMCI enabling in XEN. It removes the old p4/p6 mce files, adds those removed logic to intel common part. Also it adds the new CMCI/MCA intel specific init/interrupt processing, CMCI owner judge algorithm when (bring up...

...iers (VPID) (XEN) - Virtual NMI (XEN) - MSR direct-access bitmap (XEN) VMX: EPT is available. (XEN) VMX: VPID is available. (XEN) HVM: VMX enabled (XEN) HVM: Hardware Assisted Paging detected. (XEN) Intel machine check reporting enabled on CPU#0. (XEN) CPU0: Thermal monitoring enabled (TM1) (XEN) CMCI: find owner on CPU0 (XEN) CMCI: CPU0 owner_map[6c], no_cmci_map[93] (XEN) CPU0: Intel(R) Xeon(R) CPU E5520 @ 2.27GHz stepping 05 (XEN) Booting processor 1/16 eip 8c000 (XEN) Initializing CPU#1 (XEN) CPU: L1 I cache: 32K, L1 D cache: 32K (XEN) CPU: L2 cache: 256K (XEN) CPU: L3 cache: 8192...

...iers (VPID) (XEN) - Virtual NMI (XEN) - MSR direct-access bitmap (XEN) VMX: EPT is available. (XEN) VMX: VPID is available. (XEN) HVM: VMX enabled (XEN) HVM: Hardware Assisted Paging detected. (XEN) Intel machine check reporting enabled on CPU#0. (XEN) CPU0: Thermal monitoring enabled (TM1) (XEN) CMCI: find owner on CPU0 (XEN) CMCI: CPU0 owner_map[6c], no_cmci_map[93] (XEN) CPU0: Intel(R) Xeon(R) CPU E5520 @ 2.27GHz stepping 05 (XEN) Booting processor 1/16 eip 8c000 (XEN) Initializing CPU#1 (XEN) CPU: L1 I cache: 32K, L1 D cache: 32K (XEN) CPU: L2 cache: 256K (XEN) CPU: L3 cache: 8192...

...It appears that certain Intel CPUs (X56xx series) with hyperthreading enabled have a race condition between an SMI (from the legacy USB support in this case) and an AP (the other hyperthread) between SIPI/INIT and trying to execute the first trampoline instruction. The race condition results in a CMCI complaining about a parity error in an instruction cache is delivered to Xen as soon as the SMI handler returns. On Xen-3.x, the CMCI handler dereferences the dom0 pointer, resulting in a pagefault at this point in boot. Intel are working to track down why the CMCI is occurring in the first place,...

Hi, This is updated xen vMCE design foils, according to comments from community recently. This foils focus on vMCE part of Xen MCA, so as Keir said, it''s some dense. Later Will will present a document to elaborate more, including Intel MCA and surrounding features and Xen implementation. Thanks, Jinsong

...Core ID: 0 (XEN) VMX: Supported advanced features: (XEN) - APIC MMIO access virtualisation (XEN) - APIC TPR shadow (XEN) - Virtual NMI (XEN) - MSR direct-access bitmap (XEN) HVM: VMX enabled (XEN) Intel machine check reporting enabled on CPU#0. (XEN) CPU0: Thermal monitoring enabled (TM2) (XEN) CMCI: CPU0 has no CMCI support (XEN) CPU0: Intel(R) Xeon(R) CPU E5410 @ 2.33GHz stepping 06 (XEN) enabled ExtINT on CPU#0 (XEN) Booting processor 1/2 eip 8c000 (XEN) Initializing CPU#1 (XEN) masked ExtINT on CPU#1 (XEN) CPU: L1 I cache: 32K, L1 D cache: 32K (XEN) CPU: L2 cache: 6144K (XEN) CP...

Hi,Keir This patch (Patch 1) is for removing old p4/p6 MCA files. P4/P6 and latest families actually have similar MCA architecture so we cleanup duplicated code. Thanks& Regards, Criping _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...IRQ limits: 72 GSI, 6088 MSI/MSI-X (XEN) Switched to APIC driver x2apic_cluster. (XEN) Using scheduler: SMP Credit Scheduler (credit) (XEN) Detected 2294.545 MHz processor. (XEN) Initing memory sharing. (XEN) xstate_init: using cntxt_size: 0x340 and states: 0x 1 firstbank 0 extended MCE MSR 0 (XEN) CMCI: find owner on CPU0 (XEN) CMCI: CPU0 owner_map[fffeb], no_cmci_map[14] (XEN) Intel machine check reporting enabled (XEN) PCI: MCFG configuration 0: base c0000000 segment 0000 buses 00 - ff (XEN) PCI: MCFG area at c0000000 reserved in E820 (XEN) PCI: Using MCFG for segment 0000 bus 00-ff (XEN) Intel...

...width in GAR (XEN) Using ACPI (MADT) for SMP configuration information (XEN) SMP: Allowing 4 CPUs (0 hotplug CPUs) (XEN) IRQ limits: 24 GSI, 760 MSI/MSI-X (XEN) CPU: L1 I cache: 32K, L1 D cache: 32K (XEN) CPU: L2 cache: 4096K (XEN) CPU: Physical Processor ID: 0 (XEN) CPU: Processor Core ID: 0 (XEN) CMCI: CPU0 has no CMCI support (XEN) CPU0: Thermal monitoring enabled (TM2) (XEN) Intel machine check reporting enabled (XEN) Using scheduler: SMP Credit Scheduler (credit) (XEN) Initializing CPU#0 (XEN) Detected 2992.543 MHz processor. (XEN) Initing memory sharing. (XEN) alt table ffff82d0802b8c50 -&gt...

...as not found (XEN) Using ACPI (MADT) for SMP configuration information (XEN) SMP: Allowing 4 CPUs (0 hotplug CPUs) (XEN) IRQ limits: 24 GSI, 760 MSI/MSI-X (XEN) CPU: L1 I cache: 32K, L1 D cache: 32K (XEN) CPU: L2 cache: 4096K (XEN) CPU: Physical Processor ID: 0 (XEN) CPU: Processor Core ID: 0 (XEN) CMCI: CPU0 has no CMCI support (XEN) CPU0: Thermal monitoring enabled (TM2) (XEN) Intel machine check reporting enabled (XEN) Using scheduler: SMP Credit Scheduler (credit) (XEN) Initializing CPU#0 (XEN) Detected 2000.117 MHz processor. (XEN) Initing memory sharing. (XEN) alt table ffff82d0802b8b50 -&gt...

...GAR (XEN) Using ACPI (MADT) for SMP configuration information (XEN) SMP: Allowing 4 CPUs (0 hotplug CPUs) (XEN) IRQ limits: 24 GSI, 760 MSI/MSI-X (XEN) CPU: L1 I cache: 32K, L1 D cache: 32K (XEN) CPU: L2 cache: 4096K (XEN) CPU: Physical Processor ID: 0 (XEN) CPU: Processor Core ID: 0 (XEN) CMCI: CPU0 has no CMCI support (XEN) CPU0: Thermal monitoring enabled (TM2) (XEN) Intel machine check reporting enabled (XEN) Using scheduler: SMP Credit Scheduler (credit) (XEN) Initializing CPU#0 (XEN) Detected 2992.543 MHz processor. (XEN) Initing memory sharing. (XEN) alt table ffff82d0802b8c...

...4ff at 0xfffffe0000000000 x86bios: SSEG 0x001000-0x001fff at 0xffffff8000246000 x86bios: EBDA 0x098000-0x09ffff at 0xfffffe0000098000 x86bios: ROM 0x0a0000-0x0fefff at 0xfffffe00000a0000 APIC: CPU 0 has ACPI ID 1 APIC: CPU 1 has ACPI ID 2 APIC: CPU 2 has ACPI ID 3 APIC: CPU 3 has ACPI ID 4 lapic0: CMCI unmasked ULE: setup cpu 0 ULE: setup cpu 1 ULE: setup cpu 2 ULE: setup cpu 3 ACPI: RSDP 0xf0490 00024 (v02 SUPERM) ACPI: XSDT 0xddfaa088 00094 (v01 SUPERM SMCI--MB 00000001 AMI 00010013) ACPI: FACP 0xddfb5290 000F4 (v04 SUPERM SMCI--MB 00000001 AMI 00010013) ACPI: DSDT 0xddfaa1b8 0B0D7 (v02 SUPER...

...mbp kernel: ID: 0x00000000 VER: 0x01060015 LDR: 0x00000000 DFR: 0xffffffff Sep 20 15:40:31 rmbp kernel: lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff Sep 20 15:40:31 rmbp kernel: timer: 0x000100ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400 Sep 20 15:40:31 rmbp kernel: cmci: 0x000000f2 Sep 20 15:40:31 rmbp kernel: Cuse4BSD v0.1.26 @ /dev/cuse Sep 20 15:40:31 rmbp kernel: wlan: <802.11 Link Layer> Sep 20 15:40:31 rmbp kernel: snd_unit_init() u=0x00ff8000 [512] d=0x00007c00 [32] c=0x000003ff [1024] Sep 20 15:40:31 rmbp kernel: feeder_register: snd_unit=-1 snd_maxa...

...0 (XEN) CPU: Processor Core ID: 0 (XEN) VMX: Supported advanced features: (XEN) - APIC TPR shadow (XEN) - MSR direct-access bitmap (XEN) HVM: VMX enabled (XEN) MCE: Intel newly family MC Init (XEN) Intel machine check reporting enabled on CPU#0. (XEN) CPU0: Thermal monitoring enabled (TM2) (XEN) CMCI: CPU0 has no CMCI support (XEN) CPU0: Intel(R) Core(TM)2 CPU 6600 @ 2.40GHz stepping 06 (XEN) Booting processor 1/1 eip 8c000 (XEN) Initializing CPU#1 (XEN) CPU: L1 I cache: 32K, L1 D cache: 32K (XEN) CPU: L2 cache: 4096K (XEN) CPU: Physical Processor ID: 0 (XEN) CPU: Processor Core ID: 1...

Hi. I am using xen 4.2.2, the system runs okay. But when I suspend it, it does so, but crashes on trying to resume. Here is lsmod output: Module Size Used by xen_pciback 52011 0 xen_netback 27468 0 xen_blkback 26998 0 xen_gntalloc 13144 0 xen_gntdev 17403 1 xen_evtchn 13132 1 xenfs 12985 1 xen_privcmd 13177 5 xenfs parport_pc 28152 0 ppdev 17073 0 rfcomm 42641 12 bnep 18036 2 ext2 72837 1

Hi. I am using xen 4.2.2, the system runs okay. But when I suspend it, it does so, but crashes on trying to resume. Here is lsmod output: Module Size Used by xen_pciback 52011 0 xen_netback 27468 0 xen_blkback 26998 0 xen_gntalloc 13144 0 xen_gntdev 17403 1 xen_evtchn 13132 1 xenfs 12985 1 xen_privcmd 13177 5 xenfs parport_pc 28152 0 ppdev 17073 0 rfcomm 42641 12 bnep 18036 2 ext2 72837 1

...SI, 4552 MSI/MSI-X (XEN) Switched to APIC driver x2apic_cluster. (XEN) Using scheduler: SMP Credit Scheduler (credit) (XEN) Detected 2500.105 MHz processor. (XEN) Initing memory sharing. (XEN) xstate_init: using cntxt_size: 0x340 and states: 0x7 (XEN) mce_intel.c:1239: MCA Capability: BCAST 1 SER 1 CMCI 1 firstbank 0 extended MCE MSR 0 (XEN) Intel machine check reporting enabled (XEN) PCI: MCFG configuration 0: base 80000000 segment 0000 buses 00 - ff (XEN) PCI: MCFG area at 80000000 reserved in E820 (XEN) PCI: Using MCFG for segment 0000 bus 00-ff (XEN) Intel VT-d Snoop Control enabled. (XEN) Int...