search for: clpisd

...16 t26: f32,ch = load<Volatile LD4[@x4](tbaa=<0x3dbe418>)> t25:1, GlobalAddress:i16<float* @x4> 0, undef:i16 t27: i16 = GlobalAddress<float (float, float, float, float)* @fdivfaddfmul_a> 0 t29: ch,glue = callseq_start t26:1, TargetConstant:i16<4> t31: ch,glue = CLPISD::COPY_TO_CALLEE_A t29, t23, FrameIndex:i16<0>, t29:1 t33: ch,glue = CLPISD::COPY_TO_CALLEE_A t31, t24, FrameIndex:i16<1>, t31:1 t35: ch,glue = CLPISD::COPY_TO_CALLEE_A t33, t25, FrameIndex:i16<2>, t33:1 t37: ch,glue = CLPISD::COPY_TO_CALLEE_A t35, t26, FrameIndex:i16<3&gt...

...a=<0x3dbe418>)> t25:1, > GlobalAddress:i16<float* @x4> 0, undef:i16 > >   t27: i16 = GlobalAddress<float (float, float, float, float)* > @fdivfaddfmul_a> 0 > >   t29: ch,glue = callseq_start t26:1, TargetConstant:i16<4> > >   t31: ch,glue = CLPISD::COPY_TO_CALLEE_A t29, t23, FrameIndex:i16<0>, > t29:1 > >   t33: ch,glue = CLPISD::COPY_TO_CALLEE_A t31, t24, FrameIndex:i16<1>, > t31:1 > >   t35: ch,glue = CLPISD::COPY_TO_CALLEE_A t33, t25, FrameIndex:i16<2>, > t33:1 > >   t37: ch,glue = CLP...

Hi, Is there a kind of scope mechanism in the instruction lowering pattern language in order to control where instructions are inserted or how they are later reordered during the SelectionDiag linearization? I know the glue chain that stick instructions together. But such mechanism in not provided in instruction lowering pattern. I'm facing many situations where some patterns are lowered into

...aa=<0x3dbe418>)> t25:1, > GlobalAddress:i16<float* @x4> 0, undef:i16 > >   t27: i16 = GlobalAddress<float (float, float, float, float)* > @fdivfaddfmul_a> 0 > >   t29: ch,glue = callseq_start t26:1, TargetConstant:i16<4> > >   t31: ch,glue = CLPISD::COPY_TO_CALLEE_A t29, t23, > FrameIndex:i16<0>, > t29:1 > >   t33: ch,glue = CLPISD::COPY_TO_CALLEE_A t31, t24, > FrameIndex:i16<1>, > t31:1 > >   t35: ch,glue = CLPISD::COPY_TO_CALLEE_A t33, t25, > FrameIndex:i16<2>, > t33:1 > >   t37...

...t;, undef:i16 t59: f32 = extract_vector_elt t58, Constant:i16<0> t62: ch = llvm.clp.writeapb.f32 t58:1, TargetConstant:i16<397>, Constant:i32<24575>, t59 Combining: t59: f32 = extract_vector_elt t58, Constant:i16<0> ... into: t72: f32 = CLPISD::LOAD_VECTOR_EXTRACT_o t57:1, FrameIndex:i16<0>, Constant:i16<0> Combining: t56: ch = store<Volatile ST8[%l2]> t54:1, t55, FrameIndex:i16<1>, undef:i16 ... into: t73: ch = CLPISD::STORE_VECTOR_INSERT_oo t53:1, FrameIndex:i16<1>, t53, Constant:i16<1> t73: ch...

...seems to be correct, but a FrameIndex of 0 as been introduced : Optimized legalized selection DAG: BB#0 'storeloadi32:' SelectionDAG has 6 nodes: t0: ch = EntryToken t5: ch = store<Volatile ST4[%ptr]> t0, Constant:i32<12>, FrameIndex:i16<0>, undef:i16 t6: ch = CLPISD::RET_FLAG t5 ISEL: Starting pattern match on root node: t5: ch = store<Volatile ST4[%ptr]> t0, Constant:i32<12>, FrameIndex:i16<0>, undef:i16 The lowering correctly catches the store and morphs to right MOVSUTO_A_iSLr MC instruction: Initial Opcode index to 331 Skipped scop...