Displaying 4 results from an estimated 4 matches for "clonei".
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clone
2011 May 09
2
[LLVMdev] <badref> showed up when duplicating a list of dependent instructions
...ith the following
code trying to do the replication and insertion:
std::vector<Instruction *>::iterator p;
Instruction * pi = PREVIOUS_POSITION;
BasicBlock * pb = PREVIOUS_POSITION->getParent();
for(p = coll.begin(); p != coll.end(); ++p){
Instruction * CurI = * p;
Instruction * CloneI = CurI->clone();
CloneI->setName(CurI->getName());
errs() << *CloneI << "\n";
pb->getInstList().insertAfter(pi, CloneI); // Inserts newInst after
pi in pb
// adjust pi: point to the newly inserted inst:
pi = CurI;
}//end of for loop on p
Ho...
2011 May 09
0
[LLVMdev] <badref> showed up when duplicating a list of dependent instructions
Hi Chuck,
> std::vector<Instruction *>::iterator p;
> Instruction * pi = PREVIOUS_POSITION;
> BasicBlock * pb = PREVIOUS_POSITION->getParent();
>
> for(p = coll.begin(); p != coll.end(); ++p){
> Instruction * CurI = * p;
> Instruction * CloneI = CurI->clone();
clone doesn't know have any magical way of knowing that it should update the
instruction's operands to point to the clone you created earlier. For example,
consider
%l = load i32* @ins_h, align 4
%s = shl i32 %l, 5
You clone %l, getting:
%lc = load i32* @ins_h...
2011 May 05
0
[LLVMdev] identifying all dependent instructions through multi-levels of def-use relationship
Dear Chuck,
I haven't read all of the details, but it seems that what you need to do
is to clone defs before you clone any uses of the def. To do that, you
want to iterate over the instructions in dominator-tree order.
To do that, you first construct the dominator tree (there is an LLVM
analysis pass that does that). Then, you iterate over the basic blocks
in the dominator tree from
2011 May 04
2
[LLVMdev] identifying all dependent instructions through multi-levels of def-use relationship
While working on my optimization pass (a Function Pass), I try to
replicate a call instruction and insert it at some earlier location
(similar to LICM).
However, the instruction I am trying to replicate has dependencies on an
uncertain number of instructions that are used to generate an address.
A simple example (IR segment):
define void @foo() nounwind {
entry:
%a = alloca i32, align 4;