search for: clocking

Displaying 20 results from an estimated 5078 matches for "clocking".

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2006 Aug 24
2
Can't net ads join
Trying to do a net ads join, which has always worked fine in the past is now throwing the below errors when I try and rejoin the domain after a Windows server reboot. What am I doing wrong? :b! [2006/08/23 19:45:00, 0] libads/ldap.c:ads_add_machine_acct(1405) ads_add_machine_acct: Host account for mustang already exists - modifying old account [2006/08/23 19:45:00, 0]
2010 Feb 07
0
[LLVMdev] [PATCH] FoldingSetNodeID: use MurmurHash2 instead of SuperFastHash
While I've not reviewed the patch in too much detail, it looks promising. Can you run some end-to-end benchmarks to make sure that cache pressure in the full program or other variables not accounted for in a micro-benchmark don't dominate performance? Specifically the nightly tester includes a number of real programs and machinery to measure total compile time. On Sat, Feb 6, 2010 at 7:09
2014 May 16
2
[PATCH] clk: allow config option to enable reclocking
Adds a NvReclock boolean option to allow the user to enable (or disable) reclocking. All chipsets default to off, except NVAA/NVAC, which are reportedly complete. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Ben, I know you've been saying that reclocking is in a pretty bad state, but I do think that there are going to be groups of people for whom the curren...
2014 Aug 21
9
NVA3 clock tree improvements
Following a series of patches to improve nouveaus clock tree parsing. Reclocking these engines (all but memory) is pretty stable on the cards I've tested. Please review and merge when approved. These patches do not solve the problem that core/shader engine doesn't like to be clocked up too far without fb following, with visible corruption as a result. I suspect this pro...
2020 Sep 22
4
[PATCH] drm/nouveau/kms/nv50-: Fix clock checking algorithm in nv50_dp_mode_valid()
While I thought I had this correct (since it actually did reject modes like I expected during testing), Ville Syrjala from Intel pointed out that the logic here isn't correct. max_clock refers to the max symbol rate supported by the encoder, so limiting clock to ds_clock using max() doesn't make sense. Additionally, we want to check against 6bpc for the time being since that's the
2020 Sep 29
2
[PATCH] drm/nouveau/kms/nv50-: Fix clock checking algorithm in nv50_dp_mode_valid()
On Mon, 2020-09-28 at 16:01 +0300, Ville Syrj?l? wrote: > On Tue, Sep 22, 2020 at 05:05:10PM -0400, Lyude Paul wrote: > > While I thought I had this correct (since it actually did reject modes > > like I expected during testing), Ville Syrjala from Intel pointed out > > that the logic here isn't correct. max_clock refers to the max symbol > > rate supported by the
2010 Feb 07
3
[LLVMdev] [PATCH] FoldingSetNodeID: use MurmurHash2 instead of SuperFastHash
On Sat, Feb 06, 2010 at 04:51:15PM -0800, Chandler Carruth wrote: > While I've not reviewed the patch in too much detail, it looks > promising. Can you run some end-to-end benchmarks to make sure that > cache pressure in the full program or other variables not accounted > for in a micro-benchmark don't dominate performance? Specifically the > nightly tester includes a number
2014 Jul 26
5
[PATCH v2 0/3] drm/gk20a: support for reclocking
...please let me know what I have done wrong in terms of integration to your tree, as the main purpose of writing patches against it instead of the kernel is to make your life easier. :) Alexandre Courbot (3): clk: make therm and volt devices optional clk: support for non-BIOS pstates gk20a: reclocking support drm/Kbuild | 1 + drm/core/os.h | 1 + drm/core/subdev/clock/gk20a.c | 1 + drm/core/subdev/fb/ramgk20a.h | 1 + drm/core/subdev/instmem/gk20a.c | 1 + lib/core/os.h | 10 + nvkm/engine/device/nve0.c | 1 + nv...
2020 Feb 25
0
[PATCH 04/12] drm: Nuke mode->vrefresh
On Tue, Feb 25, 2020 at 05:45:06PM +0200, Ville Syrj?l? wrote: > On Tue, Feb 25, 2020 at 04:19:27PM +0100, Andrzej Hajda wrote: > > On 25.02.2020 12:21, Ville Syrj?l? wrote: > > > On Mon, Feb 24, 2020 at 03:14:54PM +0100, Andrzej Hajda wrote: > > >> On 19.02.2020 21:35, Ville Syrjala wrote: > > >>> From: Ville Syrj?l? <ville.syrjala at
2020 Feb 25
2
[PATCH 04/12] drm: Nuke mode->vrefresh
On Tue, Feb 25, 2020 at 04:19:27PM +0100, Andrzej Hajda wrote: > On 25.02.2020 12:21, Ville Syrj?l? wrote: > > On Mon, Feb 24, 2020 at 03:14:54PM +0100, Andrzej Hajda wrote: > >> On 19.02.2020 21:35, Ville Syrjala wrote: > >>> From: Ville Syrj?l? <ville.syrjala at linux.intel.com> > >>> > >>> Get rid of mode->vrefresh and just
2006 Nov 24
19
Time/clock issues with Xen 3.0.3?
The time appears to be perfect inside dom0, however all the domU''s tend to have a slightly faster date which gets further out of sync every day. I''m currently using Xen 3.0.3 with Gentoo Linux, under 3.0.2 I had no problems with domU clocks. Are there any known issues which could cause this? I''d strongly prefer not to run ntpd in every domU, having all domU clocks in
2010 Feb 06
4
[LLVMdev] [PATCH] FoldingSetNodeID: use MurmurHash2 instead of SuperFastHash
Some additional info can be found at: http://murmurhash.googlepages.com/ http://en.wikipedia.org/wiki/MurmurHash http://www.codeproject.com/KB/recipes/hash_functions.aspx as well as in the patch description itself. Patch and benchmark attached. Gregory -------------- next part -------------- A non-text attachment was scrubbed... Name:
2014 May 18
1
[PATCH 1/2] fb: default NvMemExec to on, turning it off is used for debugging only
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Hope I understood you correctly wrt the mem exec stuff. nvkm/subdev/fb/ramnv50.c | 2 +- nvkm/subdev/fb/ramnva3.c | 2 +- nvkm/subdev/fb/ramnvc0.c | 2 +- nvkm/subdev/fb/ramnve0.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/nvkm/subdev/fb/ramnv50.c b/nvkm/subdev/fb/ramnv50.c index ef91b6e..e5d12c2 100644
2014 May 17
0
[PATCH] clk: allow config option to enable reclocking
On 17 May 2014 02:43, "Ilia Mirkin" <imirkin at alum.mit.edu> wrote: > > Adds a NvReclock boolean option to allow the user to enable (or disable) > reclocking. All chipsets default to off, except NVAA/NVAC, which are > reportedly complete. Hey Ilia, I think I've expressed my thoughts on this previously via IRC, but let me stick them here too so there's a record of the current state... For nvaa/nvac, yes, let's enable it by default. It sh...
2020 Nov 06
3
[PATCH 0/2] drm/nouveau: Stable backport of DP clock fixes for v5.9
Just a backport of the two patches for v5.9 that you'll want to apply. The first one was Cc'd to stable, but I forgot to Cc the second one as well. Lyude Paul (2): drm/nouveau/kms/nv50-: Get rid of bogus nouveau_conn_mode_valid() drm/nouveau/kms/nv50-: Fix clock checking algorithm in nv50_dp_mode_valid() drivers/gpu/drm/nouveau/nouveau_connector.c | 36 ++++++---------------
2019 Feb 06
2
640x480 does not fill screen
Ilia Mirkin <imirkin at alum.mit.edu> writes: > On Wed, Feb 6, 2019 at 3:28 PM Dan Espen <dan1espen at gmail.com> wrote: >> >> Ilia Mirkin <imirkin at alum.mit.edu> writes: >> >> > It would be useful to know how the screen is connected. Also please >> > grab the monitor's EDID from /sys/class/drm/cardN-connector/edid and >> >
2020 Sep 29
1
[PATCH v2 1/2] drm/nouveau/kms/nv50-: Get rid of bogus nouveau_conn_mode_valid()
Ville also pointed out that I got a lot of the logic here wrong as well, whoops. While I don't think anyone's likely using 3D output with nouveau, the next patch will make nouveau_conn_mode_valid() make a lot less sense. So, let's just get rid of it and open-code it like before, while taking care to move the 3D frame packing calculations on the dot clock into the right place.
2015 Jan 08
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
> > And specify the dependencies between domains in DT? > > I think the dependencies could be in the driver. Of course the power > domains are per-SoC data, so really shouldn't be in the DTS either (the > data is all implied by the compatible value) but there's no good way to > get at the clocks and resets without DT, so I think that's a reasonable > trade-off.
2004 Jan 11
6
T1 Sync clarification
Hi List, After reading a bunch of the docs, list post archives, it still seems that a clear definition of how to clock the T100P card is muddy. zttool says that the link is "INTERNALLY CLOCKED", does this mean the T100P is providing clock, or does this mean the T100P is getting clock from the T1 line side (ergo getting clock from the Telco) ?? If you have sync = 0 then zttool
2013 Jul 29
3
[Bug 67482] New: No DP output when optimus activated in bios
https://bugs.freedesktop.org/show_bug.cgi?id=67482 Priority: medium Bug ID: 67482 Assignee: nouveau at lists.freedesktop.org Summary: No DP output when optimus activated in bios QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: Linux (All) Reporter: michele.cane at