search for: clmul

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2020 Jul 05
8
[RFC] carry-less multiplication instruction
<div> </div><div><div><p>Carry-less multiplication[1] instructions exist (at least optionally) on many architectures: armv8, RISC-V, x86_64, POWER, SPARC, C64x, and possibly more.</p><p>This proposal is to add a <code>llvm.clmul</code> instruction. Or if that is contentious, <code>llvm.experimental.bitmanip.clmul</code> instruction. It takes two integer operands of the same width, and returns an integer with twice the width of the operands. (Is there a good reason to make these the same width, as all the...
2020 Jul 09
2
[RFC] carry-less multiplication instruction
...t 12:18 PM Shawn Landden via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >>  Carry-less multiplication[1] instructions exist (at least optionally) on many architectures: armv8, RISC-V, x86_64, POWER, SPARC, C64x, and possibly more. >> >>  This proposal is to add a llvm.clmul instruction. Or if that is contentious, llvm.experimental.bitmanip.clmul instruction. It takes two integer operands of the same width, and returns an integer with twice the width of the operands. (Is there a good reason to make these the same width, as all the other operations do even when it doesn...
2020 Jul 09
2
[RFC] carry-less multiplication instruction
...Jul 5, 2020, at 5:18 AM, Shawn Landden via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Carry-less multiplication[1] instructions exist (at least optionally) on many architectures: armv8, RISC-V, x86_64, POWER, SPARC, C64x, and possibly more. > > This proposal is to add a llvm.clmul instruction. Or if that is contentious, llvm.experimental.bitmanip.clmul instruction. It takes two integer operands of the same width, and returns an integer with twice the width of the operands. (Is there a good reason to make these the same width, as all the other operations do even when it doesn...
2020 Jul 05
5
[RFC] carry-less multiplication instruction
...via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> >> >> >> Carry-less multiplication[1] instructions exist (at least optionally) on many architectures: armv8, RISC-V, x86_64, POWER, SPARC, C64x, and possibly more. >> >> This proposal is to add a llvm.clmul instruction. Or if that is contentious, llvm.experimental.bitmanip.clmul instruction. It takes two integer operands of the same width, and returns an integer with twice the width of the operands. (Is there a good reason to make these the same width, as all the other operations do even when it doesn...
2024 Dec 12
0
NSD 4.11.0 released
...ParamKeys. - Add support for NINFO, RKEY, RESINFO, WALLET, CLA and TA RR types. BUG FIXES: - Prepend -march to CFLAGS to fix architecture detection (NLnetLabs/nsd#372). - Fix propagation of implicit TTLs (NLnetLabs/nsd#375). - Fix detection of Westmere architecture by checking for CLMUL too. - Fix compilation on NetBSD (#233). - Fix reading specialized symbolic links (NLnetLabs/nsd#380). -------------- next part -------------- A non-text attachment was scrubbed... Name: OpenPGP_0xE5F8F8212F77A498_and_old_rev.asc Type: application/pgp-keys Size: 7749 bytes Desc: OpenPGP publi...
2024 Dec 05
1
NSD 4.11.0rc1 pre-release
...ParamKeys. - Add support for NINFO, RKEY, RESINFO, WALLET, CLA and TA RR types. BUG FIXES: - Prepend -march to CFLAGS to fix architecture detection (NLnetLabs/nsd#372). - Fix propagation of implicit TTLs (NLnetLabs/nsd#375). - Fix detection of Westmere architecture by checking for CLMUL too. - Fix compilation on NetBSD (#233). - Fix reading specialized symbolic links (NLnetLabs/nsd#380). -------------- next part -------------- A non-text attachment was scrubbed... Name: OpenPGP_0xE5F8F8212F77A498_and_old_rev.asc Type: application/pgp-keys Size: 7749 bytes Desc: OpenPGP publ...