search for: clk_prepare_enable

...t a/drm/nouveau/nvkm/engine/device/tegra.c b/drm/nouveau/nvkm/engine/device/tegra.c index 9afa5f3e3c1c..ec12efb4689a 100644 --- a/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drm/nouveau/nvkm/engine/device/tegra.c @@ -35,6 +35,11 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev) ret = clk_prepare_enable(tdev->clk); if (ret) goto err_clk; + if (tdev->clk_ref) { + ret = clk_prepare_enable(tdev->clk_ref); + if (ret) + goto err_clk_ref; + } ret = clk_prepare_enable(tdev->clk_pwr); if (ret) goto err_clk_pwr; @@ -57,6 +62,9 @@ nvkm_device_tegra_power_up(struct nvkm_device_teg...

After long term efforts of fixing non-common clock implementations, clk_disable() is a no-op for a NULL pointer input, and this is now tree-wide consistent. All clock consumers can safely call clk_disable(_unprepare) without NULL pointer check. Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com> --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 15 +++++----------

...gt; NULL pointer check. >> >> Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com> > > > Sorry, I retract this patch. > > Krzysztof pointed out > cleanups only for clk_disable_unprepare() will lose the code symmetry. > > NULL pointer checks for clk_prepare_enable() should be > removed to keep the code symmetrical. > > This is possible for common-clock framework because > clk_prepare_enable() is also a no-op for a NULL clk input. > But it is not necessarily true for non-common clock implementations. At least for drm/msm, upstream I think we c...

...afely call clk_disable(_unprepare) without > NULL pointer check. > > Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com> Sorry, I retract this patch. Krzysztof pointed out cleanups only for clk_disable_unprepare() will lose the code symmetry. NULL pointer checks for clk_prepare_enable() should be removed to keep the code symmetrical. This is possible for common-clock framework because clk_prepare_enable() is also a no-op for a NULL clk input. But it is not necessarily true for non-common clock implementations. -- Best Regards Masahiro Yamada

...mer.h> +#include <linux/tegra-powergate.h> + +#include "nouveau_drm.h" +#include "nouveau_platform.h" + +static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) +{ + int err; + + err = regulator_enable(gpu->vdd); + if (err) + goto err_power; + + err = clk_prepare_enable(gpu->clk); + if (err) + goto err_clk; + err = clk_prepare_enable(gpu->clk_pwr); + if (err) + goto err_clk_pwr; + clk_set_rate(gpu->clk_pwr, 204000000); + udelay(10); + + reset_control_assert(gpu->rst); + udelay(10); + + err = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); + if (...

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. This version is mostly identical to v2 but fixes an important issue: the drvdata must be set to the drm_device for sysfs to work, so the platform device structure now includes the

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. Thanks to the input received for v1, this version is more self-contained and shares less stuff between nouveau_drm and nouveau_platform. The major change is that nouveau_platform is now

...#include "nouveau_drm.h" > +#include "nouveau_platform.h" > + > +static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) > +{ > + int err; > + > + err = regulator_enable(gpu->vdd); > + if (err) > + goto err_power; > + > + err = clk_prepare_enable(gpu->clk); > + if (err) > + goto err_clk; > + err = clk_prepare_enable(gpu->clk_pwr); > + if (err) > + goto err_clk_pwr; > + clk_set_rate(gpu->clk_pwr, 204000000); > + udelay(10); > + > + reset_control_assert(gpu->rst); > + udelay(10); > + > + err =...

...lt; ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++) + clk_disable_unprepare(slim_rproc->clks[clk]); +} + +static int slim_clk_enable(struct st_slim_rproc *slim_rproc) +{ + int clk, ret; + + for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++) { + ret = clk_prepare_enable(slim_rproc->clks[clk]); + if (ret) + goto err_disable_clks; + } + + return 0; + +err_disable_clks: + while (--clk >= 0) + clk_disable_unprepare(slim_rproc->clks[clk]); + + return ret; +} + +/** + * Remoteproc slim specific device handlers + */ +static int slim_rproc_start(struct rproc...

...;clks[clk]; clk++) > + clk_disable_unprepare(slim_rproc->clks[clk]); > +} > + > +static int slim_clk_enable(struct st_slim_rproc *slim_rproc) > +{ > + int clk, ret; > + > + for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++) { > + ret = clk_prepare_enable(slim_rproc->clks[clk]); > + if (ret) > + goto err_disable_clks; > + } > + > + return 0; > + > +err_disable_clks: > + while (--clk >= 0) > + clk_disable_unprepare(slim_rproc->clks[clk]); > + > + return ret; > +} > + > +/** > + * Remoteproc sl...

...;clks[clk]; clk++) > + clk_disable_unprepare(slim_rproc->clks[clk]); > +} > + > +static int slim_clk_enable(struct st_slim_rproc *slim_rproc) > +{ > + int clk, ret; > + > + for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++) { > + ret = clk_prepare_enable(slim_rproc->clks[clk]); > + if (ret) > + goto err_disable_clks; > + } > + > + return 0; > + > +err_disable_clks: > + while (--clk >= 0) > + clk_disable_unprepare(slim_rproc->clks[clk]); > + > + return ret; > +} > + > +/** > + * Remoteproc sl...

...nprepare(slim_rproc->clks[clk]); > > +} > > + > > +static int slim_clk_enable(struct st_slim_rproc *slim_rproc) > > +{ > > + int clk, ret; > > + > > + for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++) { > > + ret = clk_prepare_enable(slim_rproc->clks[clk]); > > + if (ret) > > + goto err_disable_clks; > > + } > > + > > + return 0; > > + > > +err_disable_clks: > > + while (--clk >= 0) > > + clk_disable_unprepare(slim_rproc->clks[clk]); > > + > > + retu...

This patch series is the final (?) step towards the initial support of GK20A, allowing it to be probed and used (currently at a very slow speed, and for offscreen rendering only) on the Jetson TK1 and Venice 2 boards. The main piece if the first patch which adds platform devices probing support to Nouveau. There are probably lots of things that need to be discussed about it, e.g.: * The way the

Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite

Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite

GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot:

...ned by) __cmpxchg_acq at arch/arm64/include/asm/cmpxchg.h:140 (inlined by) __mutex_trylock_fast at kernel/locking/mutex.c:143 (inlined by) mutex_lock at kernel/locking/mutex.c:240 iommu_group_device_count at drivers/iommu/iommu.c:673 (inlined by) iommu_attach_device at drivers/iommu/iommu.c:1312 clk_prepare_enable at include/linux/clk.h:646 (inlined by) nvkm_device_tegra_power_up at drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c:37 (inlined by) nvkm_device_tegra_new at drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c:319 nouveau_platform_device_create at drivers/gpu/drm/nouveau/nouveau_drm.c:1193 nou...

A call to drm_simple_encoder_init() initializes an encoder without further functionality. It only provides the destroy callback to cleanup the encoder's state. Only few drivers implement more sophisticated encoders than that. Most drivers implement such a simple encoder and can use drm_simple_encoder_init() instead. The patchset converts drivers where the encoder's instance is embedded in

A call to drm_simple_encoder_init() initializes an encoder without further functionality. It only provides the destroy callback to cleanup the encoder's state. Only few drivers implement more sophisticated encoders than that. Most drivers implement such a simple encoder and can use drm_simple_encoder_init() instead. The patchset converts drivers where the encoder's instance is embedded in