Displaying 18 results from an estimated 18 matches for "clear_render_target".
2014 May 20
0
[PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
...ions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index 1f37527..6e68fb8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
+ BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
+ PUSH_DATA (push, ( width << 16) | dstx);
+ PUSH_DATA (push, (height << 16) | dsty);
+ BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2...
2014 May 21
0
[Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
...a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> index 1f37527..6e68fb8 100644
>> --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> @@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
>>
>> PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>>
>> + BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
>> + PUSH_DATA (push, ( width << 16) | dstx);
>> + PUSH_DATA (push, (height << 16) | dsty);...
2014 May 21
2
[Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
...> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> index 1f37527..6e68fb8 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> @@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
>
> PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>
> + BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
> + PUSH_DATA (push, ( width << 16) | dstx);
> + PUSH_DATA (push, (height << 16) | dsty);
> + BEGIN_NV04...
2014 Sep 01
2
[PATCH 1/3] nv50: set the miptree address when clearing bo's in vp2 init
...rivers/nouveau/nv50/nv84_video.c
@@ -482,12 +482,14 @@ nv84_create_decoder(struct pipe_context *context,
mip.level[0].pitch = surf.width * 4;
mip.base.domain = NOUVEAU_BO_VRAM;
mip.base.bo = dec->mbring;
+ mip.base.address = dec->mbring->offset;
context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760);
surf.offset = dec->vpring->size / 2 - 0x1000;
surf.width = 1024;
surf.height = 1;
mip.level[0].pitch = surf.width * 4;
mip.base.bo = dec->vpring;
+ mip.base.address = dec->vpring->offset;...
2013 Jun 29
2
[PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
...base.u.tex.level = 0;
>> + surf.base.texture = &mip.base.base;
>> + mip.level[0].tile_mode = 0;
>> + mip.level[0].pitch = surf.width * 4;
>> + mip.base.domain = NOUVEAU_BO_VRAM;
>> + mip.base.bo = dec->mbring;
>> + context->clear_render_target(context, (struct pipe_surface *)&surf, &color, 0, 0, 64, 4760);
>> + surf.offset = dec->vpring->size / 2 - 0x1000;
>> + surf.width = 1024;
>> + surf.height = 1;
>> + mip.level[0].pitch = surf.width * 4;
>> + mip.base.bo = dec->...
2013 Jun 29
0
[PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
...UNORM;
> + surf.base.u.tex.level = 0;
> + surf.base.texture = &mip.base.base;
> + mip.level[0].tile_mode = 0;
> + mip.level[0].pitch = surf.width * 4;
> + mip.base.domain = NOUVEAU_BO_VRAM;
> + mip.base.bo = dec->mbring;
> + context->clear_render_target(context, (struct pipe_surface *)&surf, &color, 0, 0, 64, 4760);
> + surf.offset = dec->vpring->size / 2 - 0x1000;
> + surf.width = 1024;
> + surf.height = 1;
> + mip.level[0].pitch = surf.width * 4;
> + mip.base.bo = dec->vpring;
> +...
2013 Jun 30
0
[PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
...t;>> + surf.base.texture = &mip.base.base;
>>> + mip.level[0].tile_mode = 0;
>>> + mip.level[0].pitch = surf.width * 4;
>>> + mip.base.domain = NOUVEAU_BO_VRAM;
>>> + mip.base.bo = dec->mbring;
>>> + context->clear_render_target(context, (struct pipe_surface *)&surf, &color, 0, 0, 64, 4760);
You can drop the typecast here
s/(struct pipe_surface *)&surf/&surf.base/
>>> + surf.offset = dec->vpring->size / 2 - 0x1000;
>>> + surf.width = 1024;
>>> + surf.height =...
2014 May 27
1
[PATCH V3] nvc0: implement clear_buffer
...ged, 151 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 6b7c30c..3572193 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -345,6 +345,156 @@ nvc0_clear_render_target(struct pipe_context *pipe,
}
static void
+nvc0_clear_buffer_cpu(struct pipe_context *pipe,
+ struct pipe_resource *res,
+ unsigned offset, unsigned size,
+ const void *data, int data_size)
+{
+ struct nv04_resource *buf = nv04_res...
2014 May 26
1
[PATCH V2] nvc0: implement clear_buffer
...ged, 151 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 6b7c30c..242924a 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -345,6 +345,156 @@ nvc0_clear_render_target(struct pipe_context *pipe,
}
static void
+nvc0_clear_buffer_cpu(struct pipe_context *pipe,
+ struct pipe_resource *res,
+ unsigned offset, unsigned size,
+ const void *data, int data_size)
+{
+ struct nv04_resource *buf = nv04_res...
2014 May 26
2
Implement buffer_clear for nvc0
Hi, please review the following patch!
Thanks,
Tobias Klausmann
2013 Jun 27
4
[PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
...base.format = PIPE_FORMAT_B8G8R8A8_UNORM;
+ surf.base.u.tex.level = 0;
+ surf.base.texture = &mip.base.base;
+ mip.level[0].tile_mode = 0;
+ mip.level[0].pitch = surf.width * 4;
+ mip.base.domain = NOUVEAU_BO_VRAM;
+ mip.base.bo = dec->mbring;
+ context->clear_render_target(context, (struct pipe_surface *)&surf, &color, 0, 0, 64, 4760);
+ surf.offset = dec->vpring->size / 2 - 0x1000;
+ surf.width = 1024;
+ surf.height = 1;
+ mip.level[0].pitch = surf.width * 4;
+ mip.base.bo = dec->vpring;
+ context->clear_render_targe...
2014 May 26
0
[PATCH] nvc0: Implement buffer_clear for this type of hardware
...ged, 171 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 6b7c30c..987b6c4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -345,6 +345,176 @@ nvc0_clear_render_target(struct pipe_context *pipe,
}
static void
+nvc0_clear_buffer_rgb32(struct pipe_context *pipe,
+ struct pipe_resource *res,
+ unsigned offset, unsigned size,
+ const void *data, int data_size)
+{
+ // FIXME: Find a way to do t...
2013 Jun 30
0
[PATCH v2] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
...base.format = PIPE_FORMAT_B8G8R8A8_UNORM;
+ surf.base.u.tex.level = 0;
+ surf.base.texture = &mip.base.base;
+ mip.level[0].tile_mode = 0;
+ mip.level[0].pitch = surf.width * 4;
+ mip.base.domain = NOUVEAU_BO_VRAM;
+ mip.base.bo = dec->mbring;
+ context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760);
+ surf.offset = dec->vpring->size / 2 - 0x1000;
+ surf.width = 1024;
+ surf.height = 1;
+ mip.level[0].pitch = surf.width * 4;
+ mip.base.bo = dec->vpring;
+ context->clear_render_target(context, &su...
2014 May 20
14
[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine
...ewed all of them and they make sense to me, but sending them out for
public review as well in case there are any objections.
Unless I hear objections, I'd like to push this by Friday.
Christoph Bumiller (11):
nv50,nvc0: always pull out bufctx on context destruction
nv50: setup scissors on clear_render_target/depth_stencil
nv50,nvc0: set constbufs dirty on pipe context switch
nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result
nv50/ir/opt: fix constant folding with saturate modifier
nv50/ir: fix lowering of predicated instructions (without defs)
nv50/ir/tgsi: optimize KIL
nv50,nvc0: handle g...
2014 Jun 17
0
[PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...u/nv50/nv84_video.c
index a39f572..d5aa43b 100644
--- a/src/gallium/drivers/nouveau/nv50/nv84_video.c
+++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c
@@ -492,17 +492,17 @@ nv84_create_decoder(struct pipe_context *context,
surf.offset = dec->vpring->size - 0x1000;
context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);
- PUSH_SPACE(screen->pushbuf, 5);
- PUSH_REFN(screen->pushbuf, dec->fence, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
+ PUSH_SPACE(nv50->base.pushbuf, 5);
+ PUSH_REFN(nv50->base.pushbuf, dec->fence, NOUVEAU_BO_VRA...
2014 Jun 17
2
[PATCH try 2 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++-------------
src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++--
src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++
src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-
2014 Jun 21
3
[Mesa-dev] [PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...a39f572..d5aa43b 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv84_video.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c
> @@ -492,17 +492,17 @@ nv84_create_decoder(struct pipe_context *context,
> surf.offset = dec->vpring->size - 0x1000;
> context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);
>
> - PUSH_SPACE(screen->pushbuf, 5);
> - PUSH_REFN(screen->pushbuf, dec->fence, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
> + PUSH_SPACE(nv50->base.pushbuf, 5);
> + PUSH_REFN(nv50->base.pushbuf, dec-&g...
2014 Jun 16
2
[PATCH 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++-------------
src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++--
src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++
src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 4