search for: clear_buff

...nv50_surface.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c @@ -408,9 +408,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, PUSH_DATAf(push, color->f[1]); PUSH_DATAf(push, color->f[2]); PUSH_DATAf(push, color->f[3]); - mode = - NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G | - NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A; } if (buffers & PIPE_CLEAR_DEPTH) { @@ -425,12 +422,16 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, mode |= NV50_3D_CLEAR_BUFFERS_S; } - BEGIN_NV04(push, NV50_3D(...

v2: - change patch name to "nvc0: implement clear_buffer" - rename nvc0_clear_buffer_rgb32 -> nvc0_clear_buffer_cpu and make it work for all formats - remove superfluous fenciing in nvc0_clear_buffer_cpu - coding style fixes v3: - more coding style fixes - nvc0_clear_buffer() - don't mark the framebuffer dirty for if we don't to...

...nv50_surface.c >> @@ -408,9 +408,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, >> PUSH_DATAf(push, color->f[1]); >> PUSH_DATAf(push, color->f[2]); >> PUSH_DATAf(push, color->f[3]); >> - mode = >> - NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G | >> - NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A; >> } >> > I'm not sure why you've dropped the mode from above. I'm guessing that > the initial assumption was that if there is a color buffer it must be at > c...

...vc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c index 6b7c30c..242924a 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c @@ -345,6 +345,156 @@ nvc0_clear_render_target(struct pipe_context *pipe, } static void +nvc0_clear_buffer_cpu(struct pipe_context *pipe, + struct pipe_resource *res, + unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nv04_resource *buf = nv04_resource(res); + struct pipe_transfer *pt; + struct pipe_box...

...um/drivers/nouveau/nv50/nv50_surface.c > @@ -408,9 +408,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, > PUSH_DATAf(push, color->f[1]); > PUSH_DATAf(push, color->f[2]); > PUSH_DATAf(push, color->f[3]); > - mode = > - NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G | > - NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A; > } > I'm not sure why you've dropped the mode from above. I'm guessing that the initial assumption was that if there is a color buffer it must be at cbuf[0]. The corrected ve...

...gt; @@ -408,9 +408,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, >>> PUSH_DATAf(push, color->f[1]); >>> PUSH_DATAf(push, color->f[2]); >>> PUSH_DATAf(push, color->f[3]); >>> - mode = >>> - NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G | >>> - NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A; >>> } >>> >> I'm not sure why you've dropped the mode from above. I'm guessing that >> the initial assumption was that if there is a color buffer...

Hi, please review the following patch! Thanks, Tobias Klausmann

...nv50->scissors_dirty |= 1; > + > BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1); > PUSH_DATA (push, 1); > BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5); > @@ -325,7 +333,7 @@ nv50_clear_render_target(struct pipe_context *pipe, > (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT)); > } > > - nv50->dirty |= NV50_NEW_FRAMEBUFFER; > + nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR; > } > > static void > @@ -364,6 +372,14 @@ nv50_clear_depth_stencil(struct pipe_context *pipe, > > PUSH_REFN(push, bo...

This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers as specified by glDrawBuffers). Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Not sure whether something needs to be done to clear out the old RT_* settings for that index buffer, or if things are cleared out implicitly. Perhaps instead of skipping indices, RT_CONTROL needs to be adjusted with the

...vc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c index 6b7c30c..987b6c4 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c @@ -345,6 +345,176 @@ nvc0_clear_render_target(struct pipe_context *pipe, } static void +nvc0_clear_buffer_rgb32(struct pipe_context *pipe, + struct pipe_resource *res, + unsigned offset, unsigned size, + const void *data, int data_size) +{ + // FIXME: Find a way to do this with the GPU! + + struct nvc0_context *nvc0 = nvc0_conte...

...om: Christoph Bumiller <e0425955 at student.tuwien.ac.at> >> >> [imirkin: add logic to also clear the "regular" scissors] > Can you please share why are you've added the "regular" scissors ? Because I had to when I was implementing the clear_texture and clear_buffer hooks (clear_texture didn't end up making it in quite yet because I suck at writing piglit tests, but clear_buffer is there now). Basically if scissors are set, they will apply to the clear, which is not what we want. > Does it matter if we set the screen scissors before the render target...

OK, so there's a bunch of stuff in here. The geometry stuff is based on the work started by Bryan Cain and Christoph Bumiller. Patches 01-12: Add support for geometry shaders and fix related issues Patches 13-14: Make it possible for fb clears to operate on texture attachments with an explicit layer set (as is allowed in gl 3.2). Patches 15-17: Make ARB_texture_multisample work

...c stuff to after state emission It's not too magical, it's used when vertex buffers have been modified, and when you emit an OpenGL fence, for some reason ... - nv50: make use of scissor enable/disable method This isn't actually scissors but a VIEWPORT_HORIZ/VERT, it doesn't affect CLEAR_BUFFERS. VIEWPORT_HORIZ/VERT is scissors, and you can't turn that off. The blob never turns off 0xe00. - nv50: the whole vertex emission rewrite ... I've never seen any indication that index emission has to be split in some way if you have to use multiple push buffers. But I suspect you'll...

...---------- mov byte [FuncFlag],0 ; <Ctrl-F> not pressed mov di,command_line ; ; get the very first character -- we can either time ; out, or receive a character press at this time. Some dorky BIOSes stuff ; a return in the buffer on bootup, so wipe the keyboard buffer first. ; clear_buffer: mov ah,1 ; Check for pending char int 16h @@ -1479,30 +1496,67 @@ jmp short clear_buffer get_char_time: call vgashowcursor mov cx,[KbdTimeOut] and cx,cx jz get_char ; Timeout == 0 -> no timeout inc cx ; The first loop will happen ; immediately as we don...

...entry=-1, y0=y0 at entry=-1, x1=x1 at entry=0.00885415077, y1=y1 at entry=1, z=1, s0=s0 at entry=0, t0=t0 at entry=0, s1=s1 at entry=0, t1=t1 at entry=0, color=color at entry=0x1dc781c, num_instances=num_instances at entry=1) at state_tracker/st_draw.c:489 #9 0x00007f5be03b2087 in clear_with_quad (clear_buffers=<optimized out>, ctx=0x1dc5d60) at state_tracker/st_cb_clear.c:297 #10 0x00007f5be03b2087 in st_Clear (ctx=0x1dc5d60, mask=16) at state_tracker/st_cb_clear.c:475 #11 0x00007f5bf0310811 in _cogl_framebuffer_gl_clear (framebuffer=0x1ee3000, buffers=<optimized out>, red=<optimized ou...

This patchset applies some minor fixes to renouveau.xml and then unifies the nv30 and nv40 register definitions. nv30 and nv40 are very similar and have the same offsets for the registers they share. The major differences are: 1. Texture setup is different due to full NPOT support on nv40 2. More advanced blending/render targets on nv40 3. NV30 has fixed function registers, which NV40 lacks The

...be linear */ + pipe_mutex_lock(nv50->screen->base.push_mutex); + if (clear_flags & PIPE_CLEAR_DEPTH) { BEGIN_NV04(push, NV50_3D(CLEAR_DEPTH), 1); PUSH_DATAf(push, depth); @@ -388,8 +401,10 @@ nv50_clear_depth_stencil(struct pipe_context *pipe, mode |= NV50_3D_CLEAR_BUFFERS_S; } - if (nouveau_pushbuf_space(push, 32 + sf->depth, 1, 0)) + if (nouveau_pushbuf_space(push, 32 + sf->depth, 1, 0)) { + pipe_mutex_unlock(nv50->screen->base.push_mutex); return; + } PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR); @@ -436,6...

Hi, as it was already discussed on this list, here it is my attempt in splitting virt-p2v in an own repository. Sadly there are things that must be copied from libguestfs, as it cannot be avoided. The approach taken was to run a script (will send separately) to just get the "p2v" subdirectory with its history as own repository, and then add in few followup commits all the bits needed

...} return !ret; } diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c index 6e68fb8..fd555d5 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c @@ -601,8 +601,8 @@ nv50_clear_buffer(struct pipe_context *pipe, PUSH_DATA (push, 0x3c); } - nouveau_fence_ref(nv50->screen->base.fence.current, &buf->fence); - nouveau_fence_ref(nv50->screen->base.fence.current, &buf->fence_wr); + nouveau_fence_ref(nv50->base.fence.current, &buf-&g...

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-