Displaying 20 results from an estimated 39 matches for "clc".
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2019 Jun 25
2
x86 instructions EFLAGS in TableGen
...the LLVM TableGen:
Which file in the llvm/lib/Target/X86 folder describes how the bits in
the EFLAGS register are modified by the x86 instructions? For example,
in the "X86InstrInfo.td" file, lines 2134-2135, it says:
let SchedRW = [WriteALU], Defs = [EFLAGS], Uses = [EFLAGS] in {
def CLC : I<0xF8, RawFrm, (outs), (ins), "clc", []>;
So it says the Defs of CLC is EFLAGS, but actually the CLC instruction
only clears the "CF" flag in the EFLAGS register and has nothing to do
with the other bits of EFLAGS. So which files in this folder describes
the fact th...
2008 Jun 19
1
.Rd file exists in 'man' directory, but R CMD CHECK results in warning
...9;data' directory of the source package. The
sysdata.rda file that contains the data which R CMD CHECK says I am not
providing documentation for is in the 'R' directory of the source package.
In case it matters, the .Rd file R CMD CHECK is not recognizing contains the
following:
\name{CLC.PAR}
\docType{sysdata}
\alias{CLA.PAR}
\title{Parameters for the Catch-Limit Algorithm}
\description{
This file contains parameters for input to the CLA. This file should not be
tampered with.
}
\usage{CLC.PAR}
\format{Character vector of 14 parameters}
\keyword{sysdata}
The ideal solution is to n...
2006 Aug 31
1
Problems with OS X R
Hi everyone,
I hope I'm not repeating someone else, but I am having trouble with
my R installation on my MacBook with OS X Universal. I get this error
when R starts up:
2006-08-30 10:53:50.222 R[1021] *** -[NSBundle load]: Error loading
code /Users/clc/Library/InputManagers/Smart Crash Reports/Smart Crash
Reports.bundle/Contents/MacOS/Smart Crash Reports for bundle /Users/
clc/Library/InputManagers/Smart Crash Reports/Smart Crash
Reports.bundle, error code 2 (link edit error code 0, error number 0 ())
and this one when I try to update packa...
2008 Apr 15
1
rsync-3.0.2 fails testsuite in itemize
...++ foo/config2
>f+++++++++ foo/extra
cL+++++++++ foo/sym -> ../bar/baz/rsync
>f..T...... bar/baz/rsync
>f..T...... foo/config1
>f.sTp..... foo/config2
hf..T...... foo/extra => foo/config1
.f..tp..... bar/baz/rsync
.d..t...... foo/
.f..t...... foo/config1
>fcstp..... foo/config2
cLc.T...... foo/sym -> ../bar/baz/rsync
--- /usr/src/packages/BUILD/rsync-3.0.2/testtmp/itemize/rsync.chk 2008-04-14 09:55:44.000000000 +0000
+++ /usr/src/packages/BUILD/rsync-3.0.2/testtmp/itemize/rsync.out 2008-04-14 09:55:44.000000000 +0000
@@ -2,4 +2,4 @@
.d..t...... foo/
.f..t.....
2015 Sep 29
2
OpenCL toolset (for AMD GPU)
...ing `clang -x cl` but it looks like at least some OpenCL
>> specific headers are missing (e.g. uint2 is not recognized as a type).
>>
>> Any links to documentation / tutorials very welcome. Thanks.
>>
>
> Hi,
>
> You need to include OpenCL library headers from libclc
> (http://libclc.llvm.org/) to compile most OpenCL code.
>
> Here is an example command:
>
> clang -include /path/to/libclc/headers/clc.h -I /path/to/libclc/headers -Dcl_clang_storage_class_specifiers -target amdgcn--amdhsa -mcpu=carrizo $INPUT_FILE -o $OUTPUT_FILE
Hi Tom,
to pig...
2015 Sep 29
2
OpenCL toolset (for AMD GPU)
Hi LLVM,
I would like to compile OpenCL kernel for a specific AMD GPU target. Is it
possible with the current clang/LLVM?
I started by using `clang -x cl` but it looks like at least some OpenCL
specific headers are missing (e.g. uint2 is not recognized as a type).
Any links to documentation / tutorials very welcome. Thanks.
- Paweł
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2011 Feb 23
5
mgcv: beta coefficient and 95%CI
Hi i am doing an environmental research
The equation is as follow:
gam(y1 ~ x1 + s(x2) + s(x3) + s(x4), family = gaussian, fit = true)
I would like to obtain the beta coefficient and 95CI of x4 (or s(x4)), what
should I do?
Thanks,
Lung
--
View this message in context: http://r.789695.n4.nabble.com/mgcv-beta-coefficient-and-95-CI-tp3320491p3320491.html
Sent from the R help mailing list
2015 Feb 03
2
[LLVMdev] Example for usage of LLVM/Clang/libclc
Hi,
My goal is to use Clang/LLVM/libclc to compile an OpenCL kernel and
eventually generate a PTX code. I already did this but I am not sure if the
PTX code I am generating is correct (is the one that is supposed to be
generated).
For example, currently,
In OpenCL : get_global_id(0) translates to
In LLVM : %call = tail call i32 @...
2016 Feb 12
3
Experimental 6502 backend; memory operand folding problem
Greetings, LLVM devs,
For the past few weeks, I have been putting together a 6502 backend for LLVM.
The 6502 and its derivatives, of course, have powered countless microcomputers,
game consoles and arcade machines over the past 40 years.
The backend is just an experimental hobby project right now. The code is
available here: <https://github.com/beholdnec/llvm-m6502>. This branch
introduces
2019 Jul 21
2
Altering the return address , for a function with multiple return paths
...rn,
and the unexpected return address.
SBCL stopped doing this in 2006, a decade later than it should've -- the
Pentium1 MMX from 1997 already had a hardware return stack which made this
a really bad idea!
What it does now is have the called function set or clear the carry flag
(using STC and CLC) immediately before the return. If the caller cares,
then the caller emits JNC as the first instruction after the call. (but
callers typically do not care -- most calls only consume a single value,
and any extra return-values are silently ignored).
On Sun, Jul 21, 2019, 6:18 AM Jacob Lifshay via...
2013 Feb 04
1
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Hi Nikolaos,
Following commands work great for me.
$ clang -S -emit-llvm -target nvptx -x cl -include clc/clctypes.h
../data-types/scalar.cl
$ llc -mcpu=sm_30 scalar.s
You can follow Justin's blog [1]. It helped me a lot to understand where to
start.
[1] http://jholewinski.org/blog/llvm-3-0-ptx-backend/
Best,
Ankur
On Mon, Feb 4, 2013 at 11:40 PM, Justin Holewinski <
justin.holewinski at gm...
2005 May 11
2
[LLVMdev] Re:RE: Question about inserting instructions
...r me, in dummy BB, we'd like to put some meaningless code or illegal code. From assemble machine level, it looks like
push %eax
push %ecx
pop %edx
pusha
safh
cltd
das
clc
all of them are legal one-byte x86 machine instructions. Since those instructions have no chance to be executed, so it will not affect the original code. I thought the above machine code cannot be inserted by using new Instruction(....) way because it is IR level. So maybe we can control machinei...
2009 Feb 08
1
[PATCH 1/1] COMBOOT API: Add calls for directory functions; Implement for FAT; Try 2
...diff --git a/core/comboot.inc b/core/comboot.inc
index 7210b8b..2ff5f33 100644
--- a/core/comboot.inc
+++ b/core/comboot.inc
@@ -1047,6 +1047,72 @@ comapi_kbdtable:
stc
ret
+;
+; INT 22h AX=001Fh Get current working directory
+;
+comapi_getcwd:
+ mov P_ES,cs
+ mov P_BX,CurrentDirName
+ clc
+ ret
+
+;
+; INT 22h AX=0020h Open directory
+;
+%if IS_SYSLINUX
+comapi_opendir:
+ push ds
+ mov ds,P_ES
+ mov si,P_SI
+ mov di,InitRD
+ call mangle_name
+ pop ds
+ call searchdir
+ jnz comapi_err ; Didn't find a directory
+ cmp eax,0
+ jz comapi_err ; Found nothing
+ ;ZF is unse...
2008 Dec 04
2
[PATCH 1/1] COMBOOT API: Add calls for directory functions; Implement for FAT
...re/comboot.inc b/core/comboot.inc
index 810d825..24c69e2 100644
--- a/core/comboot.inc
+++ b/core/comboot.inc
@@ -1033,6 +1033,72 @@ comapi_getadv:
;
comapi_writeadv equ adv_write
+;
+; INT 22h AX=001Eh Get current working directory
+;
+comapi_getcwd:
+ mov P_ES,cs
+ mov P_BX,CurrentDirName
+ clc
+ ret
+
+;
+; INT 22h AX=001Fh Open directory
+;
+%if IS_SYSLINUX
+comapi_opendir:
+ push ds
+ mov ds,P_ES
+ mov si,P_SI
+ mov di,InitRD
+ call mangle_name
+ pop ds
+ call searchdir
+ jnz comapi_err ; Didn't find a directory
+ cmp eax,0
+ jz comapi_err ; Found nothing
+ ;ZF is unse...
2008 Nov 22
5
[RFC][PATCH] Gfxboot COMBOOT module
...Ah
+ je .eoln
+ cmp al,' '
+ jbe .loop
+ ret
+.eof:
+ cmp al,al
+ stc
+ ret
+.eoln:
+ add al,0FFh
+ ret
+
+ungetc:
+ mov byte [ungetc_cnt],1
+ mov byte [ungetcdata],al
+ ret
+
+getc:
+ cmp byte [ungetc_cnt],1
+ jne .noungetc
+ mov byte [ungetc_cnt],0
+ mov al,[ungetcdata]
+ clc
+ ret
+.noungetc:
+ sub word [bufbytes],1
+ jc .get_data
+ mov si,trackbuf
+ add si,[bufdata]
+ mov al,[si]
+ inc word [bufdata]
+ clc
+ ret
+.get_data:
+ mov si,[f_handle]
+ and si,si
+ jz .empty
+ mov ax,7
+ mov bx,trackbuf
+ mov cx,[BufSafe]
+ int 22h
+ mov word [bufdata],0
+ j...
2002 Sep 03
0
isolinux.asm - improving spec_query_failed routine...
...jmp short get_emul_drive_ok
get_emul_trynext:
dec dl
cmp dl, 80h
jb get_emul_drive_nok
jmp get_emul_drive1
; cmp [spec_packet], 0
; je get_emul_trynext
; jmp get_emul_drive_ok
get_emul_drive_nok:
xor dl, dl
stc
jmp short get_emul_drive_exit
get_emul_drive_ok:
mov dl, [spec_packet+2]
clc
get_emul_drive_exit:
pop si
pop ax
ret
;------------------------------------------------------------
int13:
mov si, offset spec_packet
int 13h
ret
;------------------------------------------------------------
2009 Jul 15
0
[PATCH] gfxboot: parse TIMEOUT keyword
...pop si
ret
+parseint:
+ push eax
+ push ecx
+ xor eax,eax
+ xor ebx,ebx
+ xor ecx,ecx
+ mov cl,10
+.loop:
+ lodsb
+ and al,al
+ jz .done
+ cmp al,'0'
+ jb .err
+ cmp al,'9'
+ ja .err
+ sub al,'0'
+ imul ebx,ecx
+ add ebx,eax
+ jmp short .loop
+.done:
+ clc
+.ret:
+ pop ecx
+ pop eax
+ ret
+.err:
+ stc
+ jmp short .ret
+
section .data
msg_progname db 'gfxboot: ',0
msg_config_file db 'Configuration file',0
@@ -913,14 +977,18 @@ msg_crlf db 0dh,0ah,0
gfx_slash db '/', 0
db0 db 0
+menu_timeout dd 100
keywor...
2012 May 16
0
Eucalyptus 2.0.3 on CentOS - VM auto fail-over?
Hi all.
I am currently testing Eucalyptus. I have two servers, one of them has CLC,
Walrus, CC and NC, the second only NC.
When I make a new Xen VM (from kernel, initrd, filesystem image) then it is
placed on one of the nodes with NC. I would like to test VM fail-over. When
on one node the VM is not running good it should be transferred to the
second node as I think. Do I need E...
2005 May 11
0
[LLVMdev] Re:RE: Question about inserting instructions
On Wed, May 11, 2005 at 01:30:29PM -0700, Qiuyu Zhang wrote:
[snip]
> push %eax
> das
> clc
>
> all of them are legal one-byte x86 machine instructions.
[snip]
> If there is a way to be able to get that, I am supposed that like
> the following,
>
> 1. generate some dummy BB on IR level ( working on *.bc by writing a pass)
> 2. llc *.bc ( generate machine code)
&...
2009 Apr 05
3
[PATCH] Gfxboot COMBOOT module
...Ah
+ je .eoln
+ cmp al,' '
+ jbe .loop
+ ret
+.eof:
+ cmp al,al
+ stc
+ ret
+.eoln:
+ add al,0FFh
+ ret
+
+ungetc:
+ mov byte [ungetc_cnt],1
+ mov byte [ungetcdata],al
+ ret
+
+getc:
+ cmp byte [ungetc_cnt],1
+ jne .noungetc
+ mov byte [ungetc_cnt],0
+ mov al,[ungetcdata]
+ clc
+ ret
+.noungetc:
+ sub word [bufbytes],1
+ jc .get_data
+ mov si,trackbuf
+ add si,[bufdata]
+ mov al,[si]
+ inc word [bufdata]
+ clc
+ ret
+.get_data:
+ mov si,[f_handle]
+ and si,si
+ jz .empty
+ mov ax,7
+ mov bx,trackbuf
+ mov cx,[BufSafe]
+ int 22h
+ mov word [bufdata],0
+ j...