search for: classllvm_1_1selectiondag

Displaying 5 results from an estimated 5 matches for "classllvm_1_1selectiondag".

2016 Feb 02
2
creating Intrinsic DAG Node
Matt, Is this an example you are talking about: LoadedVect = DAG.getNode <http://llvm.org/docs/doxygen/html/classllvm_1_1SelectionDAG.html#ab02868bea897db34232413f1929ade1d> (ISD::INTRINSIC_WO_CHAIN <http://llvm.org/docs/doxygen/html/namespacellvm_1_1ISD.html#a22ea9cec080dd5f4f47ba234c2f59110ac771b9cda3b889242d457cc4d9b2159c>, dl, MVT::v4f64, DAG.getConstant <http://llvm.org/docs/doxygen/html/classllvm_1_1Selecti...
2016 Feb 02
2
creating Intrinsic DAG Node
Matt, Thanks for the response. Is there an example in the code somewhere of doing the intrinsic ID method? I don't need to put it a lot of places so I'm not sure it warrants adding a node. Thanks. On Tue, Feb 2, 2016 at 12:35 PM, Matt Arsenault <arsenm2 at gmail.com> wrote: > > > On Feb 2, 2016, at 09:29, Ryan Taylor via llvm-dev < > llvm-dev at lists.llvm.org>
2016 Feb 02
3
creating Intrinsic DAG Node
...16 at 2:47 PM, Matt Arsenault <arsenm2 at gmail.com> wrote: > > On Feb 2, 2016, at 11:27, Ryan Taylor <ryta1203 at gmail.com> wrote: > > Matt, > > Is this an example you are talking about: > > LoadedVect = DAG.getNode > <http://llvm.org/docs/doxygen/html/classllvm_1_1SelectionDAG.html#ab02868bea897db34232413f1929ade1d> > (ISD::INTRINSIC_WO_CHAIN > <http://llvm.org/docs/doxygen/html/namespacellvm_1_1ISD.html#a22ea9cec080dd5f4f47ba234c2f59110ac771b9cda3b889242d457cc4d9b2159c>, > dl, MVT::v4f64, > DAG.getConstant > <http://llvm.org/docs/doxygen/...
2016 Oct 29
1
Problems with Inline ASM expressions generated in the back end
Hello. I generated in the back end by hand (in C++ code, not with TableGen) some fancy assembly code using Inline ASM expressions and if I use 2 functions in my source code (but NOT just 1 function; I will not present the functions, but each requires me to generate an Inline ASM expression) I get this error at compilation (at scheduling): BB#0: derived from LLVM BB %entry
2017 Mar 14
2
Help understanding and lowering LLVM IDS conditional codes correctly
On 03/14/2017 07:16 AM, vivek pandya wrote: > Hello Hal, > setCondCodeAction(expand) for un ordered comparison generates > semantically wrong code for me for example SETUNE gets converted to > SETOE that causes infinite loops. Can you please explain what is happening? It sounds like a bug we should fix. > > What is ideal place where I can convert unordered comparison to un