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...an easy matter to simply annotate each > function with its target. We don't currently do that because we never > write out such IR files but it seems like a simple problem to solve to > me. > > If such changes are almost ready to be up-streamed, then great! Just to clariofy, the current changes simply allow a function to be completely processed (including asm generation) before the next function is sent to codegen. > It just seems like a fairly non-trivial task to actually implement > function-level target selection, especially when you consider function > c...

...> function with its target. We don't currently do that because we > never > > write out such IR files but it seems like a simple problem to solve > to > > me. > > > > If such changes are almost ready to be up-streamed, then great! > > Just to clariofy, the current changes simply allow a function to be > completely processed (including asm generation) before the next function > is sent to codegen. > > > It just seems like a fairly non-trivial task to actually implement > > function-level target selection, especially when you...

On Mon, Apr 30, 2012 at 12:55 PM, <dag at cray.com> wrote: > Tobias Grosser <tobias at grosser.es> writes: > > > To write optimizations that yield embedded GPU code, we also looked into > > three other approaches: > > > > 1. Directly create embedded target code (e.g. PTX) > > > > This would mean the optimization pass extracts device code

Tobias Grosser <tobias at grosser.es> writes: > To write optimizations that yield embedded GPU code, we also looked into > three other approaches: > > 1. Directly create embedded target code (e.g. PTX) > > This would mean the optimization pass extracts device code internally > and directly generate the relevant target code. This approach would > require our