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...tics, we can't do constant propagation. All these issues are considered Int x = 100; parallel num_threads(4) { .... atomic { x = x + 600 } } These issues exists already when you do IPO optimization cross OpenCL or Cuda kernel functions, or outlined function from ClangFE. >>>>>Another issue is how much are these intrinsics acting as “barrier” for regular optimizations? For example what prevents reordering a loop such that it is executed *before* the intrinsic that mark the beginning of the region? ClangFE will need set the "convergent" at...

Dear all, I have just created a couple of differential reviews to enable the vectorisation of loops that have function calls to routines marked with “#pragma omp declare simd”. They can be (re)viewed here: * https://reviews.llvm.org/D27249 * https://reviews.llvm.org/D27250 The current implementation allows the loop vectorizer to generate vector code for source file as: #pragma omp declare

...arOpt, e.g. interaction with vectorization when you have schedule(simd:guided: 64). What are the common properties for optimizer to know on IR-region annotations. We have our implementation working from O0, O1, O2 to O3. So far, the changes we made in the existing LLVM opt passes are < 200 LOC. ClangFE to executable end-to-end linked our omp library, and we also updated our implementation using token/tag on the intrinsics based on feedback from Google (David) and Xilinx (Hongbin). I am still owe Mehdi some answers. One feedback for PIR RFC, putting "fork" into loop body does not work...

...with > vectorization when you have schedule(simd:guided: 64). What are the > common properties for optimizer to know on IR-region annotations. We > have our implementation working from O0, O1, O2 to O3. So far, the > changes we made in the existing LLVM opt passes are < 200 LOC. ClangFE > to executable end-to-end linked our omp library, and we also updated > our implementation using token/tag on the intrinsics based on feedback > from Google (David) and Xilinx (Hongbin). I am still owe Mehdi some > answers. Thanks for the update. I will look into the discussion thr...

...tion when you have schedule(simd:guided: 64). What are the >>> common properties for optimizer to know on IR-region annotations. We >>> have our implementation working from O0, O1, O2 to O3. So far, the >>> changes we made in the existing LLVM opt passes are < 200 LOC. ClangFE >>> to executable end-to-end linked our omp library, and we also updated >>> our implementation using token/tag on the intrinsics based on feedback >>> from Google (David) and Xilinx (Hongbin). I am still owe Mehdi some >>> answers. >> Thanks for the update...

...when you have schedule(simd:guided: 64). What are > > the common properties for optimizer to know on IR-region > > annotations. We have our implementation working from O0, O1, O2 to > > O3. So far, the changes we made in the existing LLVM opt passes are > > < 200 LOC. ClangFE to executable end-to-end linked our omp library, > > and we also updated our implementation using token/tag on the > > intrinsics based on feedback from Google (David) and Xilinx > > (Hongbin). I am still owe Mehdi some answers. > Thanks for the update. I will look into the...

...v] [RFC] Enable "#pragma omp declare simd" in the LoopVectorizer Hi Francesco, Good to know, you are working on the support for this feature. I assume you knew the RFC below. The VectorABI mangling we proposed were approved by C++ Clang FE name mangling owner David M from Google, the ClangFE support was committed in its main trunk by Alexey. "Proposal for function vectorization and loop vectorization with function calls", March 2, 2016. Intel Corp. http://lists.llvm.org/pipermail/cfe-dev/2016-March/047732.html. Matt submitted patch to generate vector variants for function...

...ma omp declare simd" in the >LoopVectorizer > >Hi Francesco, > >Good to know, you are working on the support for this feature. I assume >you knew the RFC below. The VectorABI mangling we proposed were approved >by C++ Clang FE name mangling owner David M from Google, the ClangFE >support was committed in its main trunk by Alexey. > >"Proposal for function vectorization and loop vectorization with function >calls", March 2, 2016. Intel Corp. >http://lists.llvm.org/pipermail/cfe-dev/2016-March/047732.html. > >Matt submitted patch to generate ve...

...e schedule(simd:guided: 64). What are >>> the common properties for optimizer to know on IR-region >>> annotations. We have our implementation working from O0, O1, O2 to >>> O3. So far, the changes we made in the existing LLVM opt passes are >>> < 200 LOC. ClangFE to executable end-to-end linked our omp library, >>> and we also updated our implementation using token/tag on the >>> intrinsics based on feedback from Google (David) and Xilinx >>> (Hongbin). I am still owe Mehdi some answers. >> Thanks for the update. I will l...

...What are >>>>> the common properties for optimizer to know on IR-region >>>>> annotations. We have our implementation working from O0, O1, O2 to >>>>> O3. So far, the changes we made in the existing LLVM opt passes are >>>>> < 200 LOC. ClangFE to executable end-to-end linked our omp library, >>>>> and we also updated our implementation using token/tag on the >>>>> intrinsics based on feedback from Google (David) and Xilinx >>>>> (Hongbin). I am still owe Mehdi some answers. >>>> Th...

A Proposal for adding an experimental IR-level region-annotation infrastructure ============================================================================= Hal Finkel (ANL) and Xinmin Tian (Intel) This is a proposal for adding an experimental infrastructure to support annotating regions in LLVM IR, making use of intrinsics and metadata, and a generic analysis to allow transformations to

<mehdi.amini at apple.com>, Bcc: Subject: Re: [llvm-dev] [RFC][PIR] Parallel LLVM IR -- Stage 0 -- IR extension Reply-To: In-Reply-To: <20170224221713.GA931 at arch-linux-jd.home> Ping. PS. Are there actually people interested in this? We will continue working anyway but it might not make sense to put it on reviews and announce it on the ML if nobody cares. On 02/24,