Displaying 20 results from an estimated 470 matches for "clamp".
2002 Feb 25
10
Clamping tcp mss values to decrease latency
...cket in
about 150ms. I want to cut this time down to decrease latency while
serving files, so I thought I''d try and reduce the packet size for the
offending upload streams (my webserver). The trick is that I also want all
other tcp connections to have the normal full packet size. Enter
MSS-clamping. My pppoe client for linux can do mss clamping on every
packet that goes out and come in. Not enough control. There is an option
to do mss-clamping in iptables, however this only works in the forward
table. I can''t match and control outgoing web connections, just
connections getting rou...
2014 Dec 24
3
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> to enable/disable the clamp. The original function
> tegra_powergate_remove_clamping() is not sufficient for the enable
> function. So add a new function which is dedicated to the GPU rail
> gating. Also don't refer to the powergate ID since the GPU ID makes no
> sense here.
>
> Signed-off-by: Vince Hsu...
2015 Jan 09
3
[RESEND/PATCH] nv50/ir: Handle OP_CVT when folding constant expressions
...;
}
+ case OP_CVT: {
+ Storage res;
+ bld.setPosition(i, true); /* make sure bld is init'ed */
+ switch(i->dType) {
+ case TYPE_U16:
+ switch (i->sType) {
+ case TYPE_F32:
+ if (i->saturate)
+ res.data.u16 = util_iround(CLAMP(imm0.reg.data.f32, 0,
+ UINT16_MAX));
+ else
+ res.data.u16 = util_iround(imm0.reg.data.f32);
+ break;
+ case TYPE_F64:
+ if (i->saturate)
+ res.data.u16 = util_iround(CLAMP(imm0.r...
2003 Jun 02
3
[jik@kamens.brookline.ma.us: MSS clamping doesn''t work with masquerading through VPN?]
...this is not the correct forum for my question, can anyone suggest a
better person or place to which I should direct it?
Thank you,
Jonathan Kamens
------- Start of forwarded message -------
From: Jonathan Kamens <jik@kamens.brookline.ma.us>
To: lartc@mailman.ds9a.nl
Subject: [LARTC] MSS clamping doesn''t work with masquerading through VPN?
Date: Fri, 23 May 2003 12:42:10 -0400
My employer uses a Microsoft VPN concentrator. I followed the
instructions at pptpclient.sourceforge.net to add support for that
concentrator to my Linux machine; after doing so, I was able to
successful...
2014 Dec 23
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
The Tegra124 and later Tegra SoCs have a sepatate rail gating register
to enable/disable the clamp. The original function
tegra_powergate_remove_clamping() is not sufficient for the enable
function. So add a new function which is dedicated to the GPU rail
gating. Also don't refer to the powergate ID since the GPU ID makes no
sense here.
Signed-off-by: Vince Hsu <vinceh at nvidia.com>...
2014 Dec 25
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...m Donnerstag, den 25.12.2014, 10:28 +0800 schrieb Vince Hsu:
> On 12/24/2014 09:16 PM, Lucas Stach wrote:
> > Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >> to enable/disable the clamp. The original function
> >> tegra_powergate_remove_clamping() is not sufficient for the enable
> >> function. So add a new function which is dedicated to the GPU rail
> >> gating. Also don't refer to the powergate ID since the GPU ID makes no
> >> sense here....
2014 Jul 05
1
[PATCH v4] nv50/ir: Handle OP_CVT when folding constant expressions
...4->(U16/32, S16/32) and (U16/32, S16/32)->F32
No piglit regressions observed on nv50 and nvc0!
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
---
V2: fix usage of wrong variable
V3: enable F64 support
V4:
- disable F64 support again
- handle saturate flag: clamp to min/max if needed
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 121 +++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index b89da43..c97f8f4 100644
--...
2014 Dec 25
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
On 12/24/2014 09:16 PM, Lucas Stach wrote:
> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
>> to enable/disable the clamp. The original function
>> tegra_powergate_remove_clamping() is not sufficient for the enable
>> function. So add a new function which is dedicated to the GPU rail
>> gating. Also don't refer to the powergate ID since the GPU ID makes no
>> sense here.
>>
>> S...
2014 Dec 29
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...den 25.12.2014, 10:28 +0800 schrieb Vince Hsu:
>> On 12/24/2014 09:16 PM, Lucas Stach wrote:
>>> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
>>>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
>>>> to enable/disable the clamp. The original function
>>>> tegra_powergate_remove_clamping() is not sufficient for the enable
>>>> function. So add a new function which is dedicated to the GPU rail
>>>> gating. Also don't refer to the powergate ID since the GPU ID makes no
>>>>...
2015 Jan 06
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...28:08AM +0800, Vince Hsu wrote:
> >>On 12/24/2014 09:16 PM, Lucas Stach wrote:
> >>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>>>to enable/disable the clamp. The original function
> >>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>>>function. So add a new function which is dedicated to the GPU rail
> >>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
>...
2024 Aug 30
1
[PATCH -next 2/3] drm/amdgpu: use clamp() in amdgpu_vm_adjust_size()
Am 30.08.24 um 03:22 schrieb Li Zetao:
> When it needs to get a value within a certain interval, using clamp()
> makes the code easier to understand than min(max()).
>
> Signed-off-by: Li Zetao <lizetao1 at huawei.com>
This patch and #1 is a nice cleanup and Reviewed-by: Christian K?nig
<christian.koenig at amd.com>
But as Alex also pointed out patch #3 is for Nouveau and not amdgp...
2002 Feb 28
1
TCP MSS clampage
Hey,
My internet is provided via ADSL using PPPoE. When I take a look at
ifconfig''s output, I see that eth0 has an MTU of 1500, and ppp0 has an MTU
of 1492. I don''t _think_ that rp-pppoe (my pppoe util) is clamping the MSS.
I am noticing some latency when there''s a lot of bandwidth in use (but not
>90%). What should I clamp, eth0/ppp0? How much? And what with, rp-pppoe,
or tc/iproute2/etc ? I guess I don''t really understand clamping MSS, can
someone explain it in laymans terms? I...
2007 Aug 22
6
simple tbf rate clamping issues
...mpting to throttle egress traffic to a specific rate using a
tbf. As a starting point I used an example from the LARTC howto, which
goes:
tc qdisc add dev eth1 root tbf rate 220kbit latency 50ms burst 1540
I then attempt a large fetch from another machine via wget (~40 megs)
and the rate was clamped down to about 12Kbytes/s. As this seemed too
much, I gradually increased the latency up to 200ms which then gave me
the expected results (~34Kbytes/s).
I then applied this queuing discipline on a machine acting as a
gateway/router for a few VLANed subnets. The tbf was applied on
interface...
2015 Jan 06
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...25, 2014 at 10:28:08AM +0800, Vince Hsu wrote:
>> On 12/24/2014 09:16 PM, Lucas Stach wrote:
>>> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
>>>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
>>>> to enable/disable the clamp. The original function
>>>> tegra_powergate_remove_clamping() is not sufficient for the enable
>>>> function. So add a new function which is dedicated to the GPU rail
>>>> gating. Also don't refer to the powergate ID since the GPU ID makes no
>>>>...
2015 Jan 06
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...ince Hsu wrote:
>>>> On 12/24/2014 09:16 PM, Lucas Stach wrote:
>>>>> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
>>>>>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
>>>>>> to enable/disable the clamp. The original function
>>>>>> tegra_powergate_remove_clamping() is not sufficient for the enable
>>>>>> function. So add a new function which is dedicated to the GPU rail
>>>>>> gating. Also don't refer to the powergate ID since the GPU ID m...
2014 Jul 06
0
[PATCH v5] nv50/ir: Handle OP_CVT when folding constant expressions
...4->(U16/32, S16/32) and (U16/32, S16/32)->F32
No piglit regressions observed on nv50 and nvc0!
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
---
V2: fix usage of wrong variable
V3: enable F64 support
V4:
- disable F64 support again
- handle saturate flag: clamp to min/max if needed
V5: clamp before rounding to nearest uint/int
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 121 +++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir...
2015 Jan 05
4
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
On Thu, Dec 25, 2014 at 10:28:08AM +0800, Vince Hsu wrote:
> On 12/24/2014 09:16 PM, Lucas Stach wrote:
> >Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>to enable/disable the clamp. The original function
> >>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>function. So add a new function which is dedicated to the GPU rail
> >>gating. Also don't refer to the powergate ID since the GPU ID makes no
> >>sense here.
>...
2015 Jan 06
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...> >>>>On 12/24/2014 09:16 PM, Lucas Stach wrote:
> >>>>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>>>>>to enable/disable the clamp. The original function
> >>>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>>>>>function. So add a new function which is dedicated to the GPU rail
> >>>>>>gating. Also don't refer to the powergate ID since...
2019 Mar 23
2
Re: [PATCH nbdkit 6/8] data, memory: Implement extents.
...int32_t count, uint64_t offset,
> + struct nbdkit_extents *extents)
> +{
> + uint32_t n, type;
> + void *p;
> +
> + while (count > 0) {
> + p = lookup (sa, offset, false, &n, NULL);
> + if (n > count)
> + n = count;
Why are we clamping the information we return? I'd move this clamp...
> +
> + if (p == NULL)
> + type = NBDKIT_EXTENT_HOLE | NBDKIT_EXTENT_ZERO;
> + else
> + type = 0; /* allocated data */
> + if (nbdkit_add_extent (extents, offset, n, type) == -1)
> + return -1;
....
2015 Jan 06
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...t;>On 12/24/2014 09:16 PM, Lucas Stach wrote:
> > >>>>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> > >>>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> > >>>>>>to enable/disable the clamp. The original function
> > >>>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> > >>>>>>function. So add a new function which is dedicated to the GPU rail
> > >>>>>>gating. Also don't refer to the powe...