search for: cihgjhed

...he reason I am posting to this list is that a GHC compiled program (using the LLVM backend) is getting an illegal instruction exception on the this instruction: ldr r0, [r0] According to the Arm archtecture manual: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489i/CIHGJHED.html this is pre-indexed load instruction of the form: LDR{type}{cond} Rt, [Rn, #offset] but is illegal because the pre-indexed form of this instruction does not allow 'Rt' and 'Rn' to be the same register. The above all makes sense, but I find it a little hard to believe th...