Displaying 2 results from an estimated 2 matches for "cihghhie".
2014 Jun 27
2
[LLVMdev] [RFC] Add compiler scheduling barriers
...or execution under wait conditions, *then* fetch the
> ISB? This would be a *really* weird implementation, but would it be legal
> according to this spec? If so, the ISB provides *no* guarantees.)
>
> Reference:
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/CIHGHHIE.html
You've actually linked to the assembler (as in "armasm") reference
manual there. The architectural documentation of these barriers is
better, though still not airtight in my opinion. From section A3.8.3,
the bit about "program order" is new, and it's after the ISB...
2014 Jun 27
3
[LLVMdev] [RFC] Add compiler scheduling barriers
On 24 June 2014 01:55, Philip Reames <listmail at philipreames.com> wrote:
>
> On 06/19/2014 09:35 AM, Yi Kong wrote:
>>
>> Hi all,
>>
>> I'm currently working on implementing ACLE extensions for ARM. There
>> are some memory barrier intrinsics, i.e.__dsb and __isb that require
>> the compiler not to reorder instructions around their