search for: cident

Is there a less cryptic way to compare three or more values? allTheSame<-c("red","red","red","red") notAllTheSame<-c(132,132,132,999) all.identical <- function(vectorToTest){ cIdentical=sum(vectorToTest %in% vectorToTest[1]) return(cIdentical==length(vectorToTest)) } all.identical(allTheSame) all.identical(notAllTheSame) Thanks in advance, Holly

...bFLAC/ia32/stream_encoder_asm.nasm | 4 ---- 5 files changed, 20 deletions(-) diff --git a/src/libFLAC/ia32/bitreader_asm.nasm b/src/libFLAC/ia32/bitreader_asm.nasm index 4cd0ea2..b0f5ed6 100644 --- a/src/libFLAC/ia32/bitreader_asm.nasm +++ b/src/libFLAC/ia32/bitreader_asm.nasm @@ -590,7 +590,3 @@ cident FLAC__bitreader_read_rice_signed_block_asm_ia32_bswap ret end - -%ifdef OBJ_FORMAT_elf - section .note.GNU-stack noalloc -%endif diff --git a/src/libFLAC/ia32/cpu_asm.nasm b/src/libFLAC/ia32/cpu_asm.nasm index a3a3b76..05a4e6f 100644 --- a/src/libFLAC/ia32/cpu_asm.nasm +++ b/src/libFLAC/ia32/c...

...asm_ia32 -;NOTE - Since we're not in priv level 0 we can't just check CR4 bits 9 & 10, -; so right now we just assume there is no OS support. If you know -; how to write code to trap a #UD exception in nasm so we can implement -; this function correctly, let us know! -cident FLAC__cpu_info_sse_os_asm_ia32 - push ebx - mov eax, 1 - cpuid - mov eax, 0 ;we would like to 'move eax, cr4' - shr eax, 9 - and eax, 3 - pop ebx +cident FLAC__cpu_info_sse_test_asm_ia32 + xorps xmm0, xmm0 ret - end Index: src/libFLAC/include/private/cpu.h ==============================...

...p_coefficients_asm_ia32_mmx @@ -596,7 +597,7 @@ movss xmm3, xmm2 movss xmm2, xmm0 - ; xmm7:xmm6:xmm5 += xmm0:xmm0:xmm0 * xmm3:xmm3:xmm2 + ; xmm7:xmm6:xmm5 += xmm0:xmm0:xmm0 * xmm4:xmm3:xmm2 movaps xmm1, xmm0 mulps xmm1, xmm2 addps xmm5, xmm1 @@ -619,6 +620,95 @@ ret ALIGN 16 +cident FLAC__lpc_compute_autocorrelation_asm_ia32_sse_lag_16 + ;[ebp + 20] == autoc[] + ;[ebp + 16] == lag + ;[ebp + 12] == data_len + ;[ebp + 8] == data[] + ;[esp] == __m128 + ;[esp + 16] == __m128 + + push ebp + mov ebp, esp + and esp, -16 ; stack realign for SSE instructions 'movaps' and '...

So here is quick patch solving the problem, now it should be PIC. -- Miroslav Lichvar lichvarm@phoenix.inf.upol.cz -------------- next part -------------- --- lpc_asm.nasm.orig Wed Jul 18 02:23:40 2001 +++ lpc_asm.nasm Sat Nov 17 21:09:46 2001 @@ -59,10 +59,10 @@ ; ALIGN 16 cident FLAC__lpc_compute_autocorrelation_asm_ia32 - ;[esp + 24] == autoc[] - ;[esp + 20] == lag - ;[esp + 16] == data_len - ;[esp + 12] == data[] + ;[esp + 28] == autoc[] + ;[esp + 24] == lag + ;[esp + 20] == data_len + ;[esp + 16] == data[] ;ASSERT(lag > 0) ;ASSERT(lag <= 33) @@ -71,21 +71,22...

--- Miroslav Lichvar <lichvarm@phoenix.inf.upol.cz> wrote: > On Wed, Nov 14, 2001 at 09:37:47AM -0800, Josh Coalson wrote: > > cpu support for 3dnow and sse can be easily detected at > > runtime. I turned off 3dnow by default because it is > > implicated in some crashes. > > Hmm, i never have any crash. Can i get more informations about these > crases? Or you