search for: chellenge

Hi everyone, want to use R in our company but have to complete an intern questionnaire first. Can anyone help? Thanks in advance! Here the questions I’m not sure about: 1. Is R a Clientsoftware / Serversoftware / Systemsoftware? 2. Does R need a “chellenge-response” treatment for activation? 3. Is R proxy-able? 4. Is the personalised WINDOWS-NTLM-authorization at ISA-proxy possible? 5. Are any exceptions for virus scanner needed? If yes, which ones? 6. Does R changes system files or folders? (e.g. system32, registry). If yes, whic...

On Dec 20, 2006, at 2:06 PM, Roman Levenstein wrote: >> >> This will probably require a slightly more extensive patch to >> legalizer. The current mechanism assumes either 1->1 or 1->2 >> expansion. > > Exactly. This is what I meant with "more chellenging";) It is assumed > at several places that 1->1 or 2->2 expanstions are taking place. A

> >> d) Would it be possible with current implementation of soft-float > >> support to map f32/f64 to integer types smaller than i32, e.g. to > > >> i16? > >> I have the impression that it is not necessarily the case, since > it would require that f64 is split into 4 parts. > > > > Yes, this should be fine. > > > >> This

> >> d) Would it be possible with current implementation of soft-float >> support to map f32/f64 to integer types smaller than i32, e.g. to >> i16? >> I have the impression that it is not necessarily the case, since it >> would require that f64 is split into 4 parts. > > Yes, this should be fine. > >> This question is more about a theoretical

Hi, I was working on extending soft-float support for handling expansion of i64 and f64 into i16, i.e. on supporting the expansion of long values of illegal types into more then two parts. For that I modified SelectionDAGLowering::getValue() and several other functions. This seems to work now on my test-cases, but while testing it I ran into a different problem. I have the impression that I

On Thu, 21 Dec 2006, Roman Levenstein wrote: > following: > 1) some of the fixed registers intervals are merged with some virtual > registers intervals > 2) later there is a need to spill one of the allocated registers, but > since all joined intervals are FIXED intervals now due to (1), they > cannot be spilled. Therefore, the register allocator loops for ever. > > I would

With all the recent discussion of SSD''s that lack suitable power-failure cache protection, surely there''s an opportunity for a separate modular solution? I know there used to be (years and years ago) small internal UPS''s that fit in a few 5.25" drive bays. They were designed to power the motherboard and peripherals, with the advantage of simplicity and efficiency

Hi, I tried out the new soft-float support from the mainline. Overall, it looks very nice and pretty clean. It is now extremely easy to add the soft-float support for your target. Just do not call addRegisterClass() for your FP types and they will be expanded into libcalls. But there are several minor things that would be still nice to have: a) It is not possible to express that: - f32 and