search for: chan_id

...fchan) +{ + struct virt_dma_desc *vdesc; + unsigned long nbytes, ch_cmd, cmd; + + vdesc = vchan_next_desc(&fchan->vchan); + if (!vdesc) + return; + + fchan->fdesc = to_st_fdma_desc(vdesc); + nbytes = fchan->fdesc->node[0].desc->nbytes; + cmd = FDMA_CMD_START(fchan->vchan.chan.chan_id); + ch_cmd = fchan->fdesc->node[0].pdesc | FDMA_CH_CMD_STA_START; + + /* start the channel for the descriptor */ + fnode_write(fchan, nbytes, FDMA_CNTN_OFST); + fchan_write(fchan, ch_cmd, FDMA_CH_CMD_OFST); + writel(cmd, + fchan->fdev->slim_rproc->peri + FDMA_CMD_SET_OFST); + + dev_...

Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite

Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite

...] -- Starting timer 0x26784d8 with timeout 30000 ms 2013-08-08 15:41:18.633844 [WARNING] ftmod_libpri.c:1975 [s1c15][1:15] -- T316 timed out, resending RESTART request ftdm dump 1 n (where n is from 1 to 15 and 17 to 31) is showing state as down freeswitch at dst1> ftdm dump 1 1 span_id: 1 chan_id: n physical_span_id: 1 physical_chan_id: n physical_status: ok physical_status_red: 0 physical_status_yellow: 0 physical_status_rai: 0 physical_status_blue: 0 physical_status_ais: 0 physical_status_general: 0 signaling_status: UP type: B state: DOWN last_state: RESTART txgain: 0.00 rxgain: 0.00 cid...