Displaying 2 results from an estimated 2 matches for "ch06s05s01".
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ch03s03s01
2016 Oct 28
3
[cfe-dev] Using lld in ELLCC for different targets
.... I know that the processor is
> bi-endian, but is there any system that uses ARM32 in big-endian mode?
Yes... it is "a thing". :)
ARM has two modes: BE32 and BE8 (mixed) and they can be enabled via
CP15 registers.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0290g/ch06s05s01.html
cheers,
--renato
2016 Oct 28
0
[cfe-dev] Using lld in ELLCC for different targets
On Fri, Oct 28, 2016 at 2:56 PM, Richard Pennington via cfe-dev <
cfe-dev at lists.llvm.org> wrote:
> With all the talk about using lld on the list, I thought it would be
> interesting to try using it in my clang based ELLCC cross compilation tool
> chain. http://ellcc.org
>
> The change was simple, since I use configuration files to tell clang how
> to compile, where to