Displaying 1 result from an estimated 1 matches for "cf5c9c4".
2009 Nov 06
2
[PATCH 1/2] drm/nv10: Keep the lower bits of PGRAPH_CTX_USER during context switches.
...because of a malfunctioning M2MF).
Signed-off-by: Francisco Jerez <currojerez at riseup.net>
---
drivers/gpu/drm/nouveau/nv10_graph.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index cf5c9c4..6bf6804 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -673,7 +673,8 @@ int nv10_graph_load_context(struct nouveau_channel *chan)
nv10_graph_load_pipe(chan);
nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10010100);
- nv_wr32(dev, NV10_PGRAPH_CTX_USE...