search for: celoxica

...car. And in the car power is at a premium so I wanted true hardware support (unlike phatnoise which is software based). The car will support both playback and archival. There will be a wireless (802.11a?) link between both servers which will sync when in range. I found this link: http://www.celoxica.com/home.htm They have a C to (V)HDL converter. I'm just now learning VHDL and was wondering if anyone has tried to implement it yet. If so I would like to see your code for reference/starting point. Thanks in advance Alijah Ballard

...tion available from the downloads and the web and haven't yet come across a block diagram which shows exactly how the process of going from a .wav file to a .ogg file works. I suspect it is the same as the mp3 process (with a different psychoacoustic model). I found this document: http://www.celoxica.com/products/technical_papers/case_studies/cs_001.htm which shows a block diagram for the mp3 process. Is this the same for vorbis? We are trying to do something similar to the article in that we want to produce a vorbis decoder in hardware. We a have a develpoment board from Celoxica. We want...

...tion available from the downloads and the web and haven't yet come across a block diagram which shows exactly how the process of going from a .wav file to a .ogg file works. I suspect it is the same as the mp3 process (with a different psychoacoustic model). I found this document: http://www.celoxica.com/products/technical_papers/case_studies/cs_001.htm which shows a block diagram for the mp3 process. Is this the same for vorbis? We are trying to do something similar to the article in that we want to produce a vorbis decoder in hardware. We a have a develpoment board from Celoxica. We want...

Hello, Im (trying) to write a backend for a simple 32bit processor architecture, with a single instruction format having no condition code registers. www.docm.mmu.ac.uk/STAFF/A.Nisbet/Sabre.pdf is the short 15 page document describing the architecture of Sabre. It is a Celoxica developed research/teaching processor, pages 5-8 contain relevant information for targetting it from a new compiler backend, i,e, it is trivially simple with 25 actual instructions. Typo on page 5, operand A is clearly bits 9-5. The general form for instructions is:-- opcode %a, %b, 17bit sign...