Displaying 2 results from an estimated 2 matches for "ceil_l_".
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ceil_l_s
2012 May 22
2
[LLVMdev] Match operands
...";
}
}
defm CEIL_W : FFR1_W_M<0xe, "ceil">;
defm CEIL_L : FFR1_L_M<0xa, "ceil">;
When assembly matcher is generated these are created as five instructions, each having 'ceil' as mnemonic:
static const MatchEntry MatchTable[277] = {
.
.
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{ Mips::CEIL_L_D64, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_d, MCK_FGR64, MCK_FGR64 }, Feature_IsFP64bit, 0},
{ Mips::CEIL_L_S, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_s, MCK_FGR64, MCK_FGR32 }, Feature_IsFP64bit, 0},
{ Mips::CEIL_W_D64, 93 /* ceil */, Convert__Reg...
2012 May 22
0
[LLVMdev] Match operands
...ot;ceil">;
> defm CEIL_L : FFR1_L_M<0xa, "ceil">;
>
> When assembly matcher is generated these are created as five instructions, each having 'ceil' as mnemonic:
>
> static const MatchEntry MatchTable[277] = {
> .
> .
> .
>
> { Mips::CEIL_L_D64, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_d, MCK_FGR64, MCK_FGR64 }, Feature_IsFP64bit, 0},
> { Mips::CEIL_L_S, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_s, MCK_FGR64, MCK_FGR32 }, Feature_IsFP64bit, 0},
> { Mips::CEIL_W_D64, 93 /* ceil */, Co...