Displaying 1 result from an estimated 1 matches for "cdf6fe2b".
2016 Oct 28
1
Vector Shuffle chain lowering to X86 instructions simplification inconsistencies
Hi all,
Attached herewith is a fairly simple LLVM file (shuffle.ll) with lots of
vector shuffles.
When I use llc with -O3 -mcpu=core-avx2 the first shuffle sequence
containing types of 128 wide gets reduced a single shuffle, where as the
second shuffle sequence containing types of 256 wide doesn't get reduced to
a single shuffle instruction in the resulting X86 code (Shuffle.s attached).