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My wife and I each have our own workstation dual-booting WinXP and Gentoo Linux. We also have a third which runs Gentoo all the time. I wanted to set up samba on the third box and provide some extra storage space for both our Windows installs. It worked for a few days, then all of a sudden it stopped letting my account (michael) in while still letting my wife's account (amy) use the share.

Thanks Hal. On Fri, Oct 28, 2011 at 2:19 AM, Hal Finkel <hfinkel at anl.gov> wrote: > Carter, > > In my opinion (and I was the one who committed the changes in question), > it depends on the hardware. The pipeline descriptions are for the PPC > 440, which is an embedded PPC chip use in a variety of places. As such, > it is a fairly specific target, and using

I hope you don't mind if do have a follow up question- is code in place in the code generation supporting "proper" scheduling via the processor itineraries in LLVM? On Fri, Oct 28, 2011 at 8:47 PM, Carter Cheng <cartercheng at gmail.com> wrote: > Thanks Hal. > > On Fri, Oct 28, 2011 at 2:19 AM, Hal Finkel <hfinkel at anl.gov> wrote: > >> Carter,

Hello, This is probably a bit of a beginner's question but I am new to LLVM I have been examining the possibility of constructing something similar to the JnJVM for a language which supports dynamic class loading. The problem I am having is determining how the JIT system allows for dynamic loading of functions into the JIT. The paper indicates the JnJVM use some sort of callback when the JIT

LinkedIn ------------ Carter Cheng requested to add you as a connection on LinkedIn: ------------------------------------------ Jian, I'd like to add you to my professional network on LinkedIn. - Carter Accept invitation from Carter Cheng

I apologize if this has been asked before but which classes utilize the information in these files? I am asking since I am trying to extend the MIPS backend to 64bit among other things. Thanks in advance, Carter.

Yes. But it is not really being used by most (any?) targets because post-RA scheduling is disabled by default. Also, the existing model is very limited in what types of micro-architectures can be described. I've been extending it to enable scheduling of multi-issue targets, targets with overlapping FU usage, and targets that use and define registers in multiple pipeline stages. See

Actually after some digging I managed to answer these questions for myself. I am guessing that this information is used by the Schedule* classes in CodeGen. --- On Mon, 8/17/09, Carter Cheng <carter_cheng at yahoo.com> wrote: > From: Carter Cheng <carter_cheng at yahoo.com> > Subject: [LLVMdev] ARMSchedule.td MipsSchedule.td etc. > To: llvmdev at cs.uiuc.edu > Date:

Hi Carter, Carter Cheng wrote: > Hello, > > This is probably a bit of a beginner's question but I am new to LLVM > I have been examining the possibility of constructing something similar to the JnJVM for a language which supports dynamic class loading. The problem I am having is determining how the JIT system allows for dynamic loading of functions into the JIT. The paper

Hello, I was looking over some of the Target commits. I did notice some detailed pipeline descriptions in the ppc backends. I havent noticed anything in the literature describing this technique. Is this a standard approach for mapping SSA to hardware? Thanks in advance, Carter. -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hello All, I'm just getting into *, and trying to use a Broadvoice account. It works inbound, but Outbound fails no matter what sip.conf parameters I try. From the recent posts here I think it could be: A bad CVS release - I will try to download and build from a new one Broadvoice not challenging and/or Asterisk not responding with an Authorization: in the INVITE header. I am

Hello, I was looking over the documentation support for exceptions and it indicates that the invoke unwind support is incomplete. Is this still the case in 2.9? Regards, Carter. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110814/400bcca0/attachment.html>

Jim, What I am doing is modeling from ARM and X86 just enough to get "hello world" to produce correct ELF output. >From many years of experience I know this will leave me with little understanding of what is going on and I will need to have this understanding to really add long term value. Maybe my questions will help frame the how-to-and-why documentation. I think my first patch

OK.. I'm up to my eyes in LD BS! I can't for the life of me understand how any carrier, either VoIP or traditional service provider can make heads or tails of how to hand off an * based call to an LD provider. Every provider I talk to, says I have to have a traditional T1 put in to their respective networks. I don't want to do this. I want a LD provider that can take a IP, SIP, IAX

Hi, Which of the various Wine downloads on the download page should I get for PCLinuxOS? Thanks. Stephen Carter

We are already generating object directly. It is on my roadmap to implement the standalone assembler, but I was hoping for some suggestions ;-) My target is Mips and I have started looking at what ARM does. If there is a better model or how-to guide I'd like to know. Thanks, Jack ________________________________ From: Owen Anderson [resistor at mac.com] Sent: Wednesday, January 11, 2012

Carter, In my opinion (and I was the one who committed the changes in question), it depends on the hardware. The pipeline descriptions are for the PPC 440, which is an embedded PPC chip use in a variety of places. As such, it is a fairly specific target, and using pipeline-hazard-based scheduling for specific embedded targets is not uncommon. The backends for ARM and MBlaze have similar pipeline

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Issue: GraphWriter includes <ostream>, which my gcc2 apparently thinks is <ostream.h>. Fix: Make a new <Support/ostream> that handles this discrepancy, ala <Support/hash_set>. -- Casey Carter Casey at Carter.net ccarter at uiuc.edu AIM: cartec69 -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: patch URL:

Hello, I have been working on a llvm instrumentation pass as an exercise to get up to speed on how llvm operates. I am curious about what the best way would be to create a shadow table at a fixed address in low memory starting at 0x10000 and extending upwards. I am unclear about the correct approach from looking at the DataFlowSanitizer since getOrInsertGlobal seems to be used on a limited number