search for: cannonlake

Displaying 9 results from an estimated 9 matches for "cannonlake".

2017 Jul 19
0
[ANNOUNCE] libdrm 2.4.82
...e Michel Dänzer (2): tests/amdgpu: s/uvd_messages.h/decode_messages.h/ in Makefile.am amdgpu: Add .editorconfig file for amdgpu coding style Paulo Zanoni (1): intel: add GEN10 to IS_9XX. Rob Herring (1): Android: fix missing trailing \ Rodrigo Vivi (3): intel: Add Cannonlake PCI IDs for U-skus. intel: Add Cannonlake PCI IDs for Y-skus. intel/intel_chipset: Move IS_9XX below IS_GEN10. Tom St Denis (1): tests/amdgpu: Fix device_id option Xiaojie Yuan (1): amdgpu: move asic id table to a separate file coypu (1): Remove redundant memclear...
2019 Mar 23
2
Generating object files more efficiently
...9; note: valid target CPU values are: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cannonlake, icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, x86-64 ________________________________ From: Doerfert, Johannes <jdoerfert...
2019 Mar 23
4
Generating object files more efficiently
...9; note: valid target CPU values are: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cannonlake, icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, x86-64 ________________________________ From: Doerfert, Johannes <jdoerfert...
2019 Mar 23
2
Generating object files more efficiently
...t CPU values are: nocona, core2, penryn, bonnell, atom, > silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, > westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, > core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, > cannonlake, icelake-client, icelake-server, knl, knm, k8, athlon64, > athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, > barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, > znver2, > x86-64 > > > ------------------------------ > *Fr...
2017 Oct 04
0
[ANNOUNCE] intel-gpu-tools 1.20
...or launching external processes and capturing their outputs. (Abdiel Janulgue) - Increased max pipe count to 6 to support AMD GPUs. (Leo (Sunpeng) Li) - Various improvements for Chamelium support. (Paul Kocialkowski) - Added Coffeelake platform support. (Rodrigo Vivi, Anusha Srivatsa) - Added Cannonlake platform support. (Rodrigo Vivi) - Added support for audio testing. (Paul Kocialkowski) - Added preliminary meson build system support. (Daniel Vetter, et al) -- Autotools remains the supported build system for now. Tools changes: - Refactored video bios data to use definitions copied from th...
2018 May 09
0
[ANNOUNCE] libdrm 2.4.92
...for ICL 11 Qiang Yu (1): amdgpu:support 16 ibs per submit for PAL/SRIOV Rex Zhu (1): headers: sync up amdgpu_drm.h with drm-next Rob Clark (2): freedreno: add fd_pipe refcounting bump version for release Rodrigo Vivi (1): intel/intel_chipset.h: Sync Cannonlake IDs. Sabre Shao (1): drm/amdgpu: Remove IB count checking Satyajit (1): libdrm: amdgpu: Adding DRM_RDWR flag in amdgpu_bo_export Seung-Woo Kim (1): tests/exynos: remove dead condition Stefan Schake (1): android: Add missing include exports Tomasz Fig...
2019 Mar 23
2
Generating object files more efficiently
Currently I compile my C code in 2 steps in order to generate .o files clang -emit-llvm -c foo.c -o foo.bc llc -march=XYZ foo.bc -filetype=obj Is there a way to generate either .o or .elf files in just 1 command? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190323/da9b3c18/attachment.html>
2018 Jan 16
0
[ANNOUNCE] intel-gpu-tools 1.21
...ers include/drm-uapi: bump headers tests/perf: drop copied i915 defines/structs tests/perf: factorize max oa buffer size define tests/perf: query CS timestamp frequency if available tests/perf: enable testing on Coffeelake GT3 tests/perf: add test config uuid for Cannonlake tests/perf: skip config tests on older kernels overlay: parse tracepoints from sysfs to figure out fields' location Lucas De Marchi (3): lib/i915_pciids.h: synchronize with kernel header lib/i915_pciids.h: synchronize with kernel header meson: use message() rather...
2018 Mar 09
0
[ANNOUNCE] intel-gpu-tools 1.22
..., bump version to 1.22. Rhys Kidd (5): doc: Fix typos in CONTRIBUTING lib/igt.cocci: Fix typo doc: Correct sentence in README doc: Update CONTRIBUTING for new igt-dev mailing list man: Update for new igt-dev mailing list Rodrigo Vivi (1): lib/i915_pciids.h: Add Cannonlake PCI IDs for another SKU. Sagar Arun Kamble (1): tools/intel_guc_logger: Send GuC log level in new i915 expected format Scott D Phillips (1): tools/intel_aubdump: Simulate "enhanced execlist" submission for gen11+ Sean Paul (1): CONTRIBUTING: Fix spelling mistake and l...