search for: call64r

Hi, i have got some troubles while trying to instrumentate a indirect call instruction. Basically, every time i run into a CALL64r i would like to have this situation: ------ | .... | | CMP | | JE | ------ | | --- ----- | | ---- ---- |EXIT| |CALL|...

Hi, i have got some troubles while writing an X86 machine pass to instrumentate indirect calls . Basically, every time i run into a CALL64r i would like to have this situation: ------ | .... | | CMP | | JE | ------ | | --- ----- | | ---- ---- |EXIT| |CALL|...

...per class. Hopefully, if it's a member, it's public.) Looks like X86ATTInstPrinter::getRegisterName() and X86IntelInstPrinter::getRegisterName() are static, public members. It would still be handy to expose an enum somewhere. This is to support something like: if (Inst.getOpcode() == X86::CALL64r) { if (Inst.getOperand(0).getReg() == X86::RIP) { // ... } } E.g., exposing some of the tablegened enums in X86GenRegisterInfo.inc and X86GenInstrInfo.inc would be very handy. Steve > > > On Oct 28, 2013 12:03 PM, "Stephen Checkoway" <s at pahtak.org> wrote: &g...

After removing CALL64m, the resulting DAG has a cycle that cannot be scheduled. I've attached a PDF of the DAG before instruction selection (-view-isel-dags), and after instruction select (-view-sched-dags). Notice how the flag/chain relationships between MOV64rm and CALL64r make it impossible to schedule. Here's the code being compiled: define ccc void @ArgsFree() nounwind { entry: %0 = load void (i8*)** undef, align 4 call ccc void %0(i8* undef) nounwind unreachable } Is this a bug in LLVM, or is there something else I need to do than just remove CALL64m...

...a member, it's public.) > > Looks like X86ATTInstPrinter::getRegisterName() and > X86IntelInstPrinter::getRegisterName() are static, public members. It would > still be handy to expose an enum somewhere. This is to support something > like: > > if (Inst.getOpcode() == X86::CALL64r) { > if (Inst.getOperand(0).getReg() == X86::RIP) { > // ... > } > } > > E.g., exposing some of the tablegened enums in X86GenRegisterInfo.inc and > X86GenInstrInfo.inc would be very handy. > > Steve > > > > > > > On Oct 28, 2013 12:03 PM, &qu...

See the source here: https://github.com/earl/llvm-mirror/blob/master/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp. It looks like getRegisterName might do what you want, but I don't know where it's coming from. (Whether it's a function or a member of a super class. Hopefully, if it's a member, it's public.) PS Sorry for the duplicate, Stephen. I forgot to CC the list. On

...cpp:5:1 MOV32mr %RSP, 1, %reg0, 20, %reg0, %EAX; mem:ST4[%X] dbg:l8.cpp:5:1 %EDI<def> = ADD32rr %EDI, %EAX<kill>, %EFLAGS<imp-def,dead>; dbg:l8.cpp:6:1 MOV32mr %RSP, 1, %reg0, 20, %reg0, %EDI; mem:ST4[%X] dbg:l8.cpp:6:1 %RAX<def> = MOV64ri <ga:@intDisp>; dbg:l8.cpp:7:1 CALL64r %RAX<kill>, %EDI<kill>, %RAX<imp-def,dead>, %RDI<imp-def,dead>, %RSP<imp-use>, ...; dbg:l8.cpp:7:1 %RSP<def> = ADD64ri8 %RSP, 24, %EFLAGS<imp-def,dead>; dbg:l8.cpp:7:1 RET; dbg:l8.cpp:7:1 My other questions are: 1. What is the correct way to obtain the r...

I'm iterating over MCInsts and I'd like to examine particular instructions. For example, I'd like to look at all x86 CALL64m instructions. I may be missing something, but it seems like my only option is to use MCInstPrinter::getOpcodeName and compare strings. (Of course, I could iterate through the opcodes and build up a table of the ones I'm interested in to avoid string

...ck_flush(%struct.CPUX86State* %62) noinline, !flags !12 - ppc call void @helper_shack_flush(%struct.CPUX86State* %62) noinline, !flags !10 After lowering above LLVM IR for x86 and ppc, it becomes: - x86 %RAX<def> = MOV64ri <ga:@helper_shack_flush> %RDI<def> = COPY %RBX CALL64r %RAX<kill>, %RDI<kill>, %RAX<imp-def,dead>, %RCX<imp-def,dead>, %RDX<imp-def,dead>, %RSI<imp-def,dead>, %%RDI<imp-def,dead>, %R8<imp-def,dead>, %EFLAGS<imp-def,dead>, %RSP<imp-use>, ... - ppc %X4<def> = LDtoc <ga:@helper_shack_...

On Tue, Jun 8, 2010 at 4:20 PM, David Meyer <pdox at google.com> wrote: > Hi Eli, > I have tried this, but the resulting tool-chain was broken. > There are only two references to "CALL64m": the definition in > X86Instr64bit.td, and an entry in X86InstrInfo.cpp. > After commenting both out, compilation of a large application fails with: > llc: ScheduleDAG.cpp:462:

Hi Eli, I have tried this, but the resulting tool-chain was broken. There are only two references to "CALL64m": the definition in X86Instr64bit.td, and an entry in X86InstrInfo.cpp. After commenting both out, compilation of a large application fails with: llc: ScheduleDAG.cpp:462: void llvm::ScheduleDAGTopologicalSort::InitDAGTopologicalSorting(): Assertion `Node2Index[SU->NodeNum]