search for: cache_op

- Use more friendly output with GiB and MiB/s. - Measure time per operation, providing finer grain stats - Add missing stats for flush I hope that these changes will help to understand and imporve virt-v2v performance. Nir Soffer (3): filters: stats: Show size in GiB, rate in MiB/s filters: stats: Measure time per operation filters: stats: Add flush stats filters/stats/stats.c | 117

...-49,6 +49,10 @@ #include "cleanup.h" #include "tvdiff.h" +#define MiB 1048576.0 +#define GiB 1073741824.0 +#define USEC 1000000.0 + static char *filename; static bool append; static FILE *fp; @@ -64,34 +68,34 @@ static uint64_t extents_ops, extents_bytes; static uint64_t cache_ops, cache_bytes; static inline double -calc_bps (uint64_t bytes, int64_t usecs) +calc_mibps (uint64_t bytes, int64_t usecs) { - return 8.0 * bytes / usecs * 1000000.; + return bytes / MiB / usecs * USEC; } static inline void print_stats (int64_t usecs) { - fprintf (fp, "elapsed time...

...all the stats. */ static pthread_mutex_t lock = PTHREAD_MUTEX_INITIALIZER; -static uint64_t pread_ops, pread_bytes; -static uint64_t pwrite_ops, pwrite_bytes; -static uint64_t trim_ops, trim_bytes; -static uint64_t zero_ops, zero_bytes; -static uint64_t extents_ops, extents_bytes; -static uint64_t cache_ops, cache_bytes; +static uint64_t pread_ops, pread_bytes, pread_usecs; +static uint64_t pwrite_ops, pwrite_bytes, pwrite_usecs; +static uint64_t trim_ops, trim_bytes, trim_usecs; +static uint64_t zero_ops, zero_bytes, zero_usecs; +static uint64_t extents_ops, extents_bytes, extents_usecs; +static uin...

...include "tvdiff.h" > > +#define MiB 1048576.0 > +#define GiB 1073741824.0 > +#define USEC 1000000.0 > + > static char *filename; > static bool append; > static FILE *fp; > @@ -64,34 +68,34 @@ static uint64_t extents_ops, extents_bytes; > static uint64_t cache_ops, cache_bytes; > > static inline double > -calc_bps (uint64_t bytes, int64_t usecs) > +calc_mibps (uint64_t bytes, int64_t usecs) > { > - return 8.0 * bytes / usecs * 1000000.; > + return bytes / MiB / usecs * USEC; > } The idea isn't bad, but I think we can lose...

...mbine directory, which seems to be very close to what I need. I even see mention of "pattern matching" in these files. However, I'm confused as to whether there is a standard way to write patterns and replacements (e.g. specifying that load-load-op-store gets replaced with cache_op), or if I'll just have to roll my own version. 3. When I eventually find a matching load-load-op-store pattern in the IR, my thought was to replace it using an intrinsic function ( https://llvm.org/docs/ExtendingLLVM.html#intrinsic-function) so that it can later be compiled to x86 b...

...st come from your experiential knowledge? FYI, I achieved what I set out to achieve when I wrote this email. I'm moving on to a more complex goal now, but the original question was answered completely, in my opinion. This was the key line: def CACHEOP : I<0x06, RawFrm, (outs), (ins), "cache_op", [(int_cache_op)]>; I added this definition to llvm/lib/Target/X86/X86InstrInfo.td. I also had to comment out an instruction (PUSHES) which overlapped the 0x06 opcode. This was OK in my case (as far as I know) because PUSHES isn't implemented in gem5. Thanks again! Gus On Sun, Mar...

ASM is the text output you want printed in a textual listing of the assembly. The curly braces you see in some text strings like "adcx{l}\t{$src, $dst|$dst, $src}" are there to provide different operand orders for at&t syntax vs intel syntax. Anything after $ matches the name in the outs/in part of the instruction. IIC_SSE_PREFETCH is part of the scheduler system to provide

Craig, thanks for the quick response. That helps a lot. I had no clue they were buried in there, though I guess I should have looked harder -- the hex should have given me a clue, perhaps! For the sake of my own edification (and not taking up too much of your time) I will try to generate it myself. I've found the definition of the "I" class at line 358 of

Since v1: - rework .can_cache to be tri-state, with default of no advertisement (ripple effect through other patches) - add a lot more patches in order to round out filter support And in the meantime, Rich pushed NBD_CMD_CACHE support into libnbd, so in theory we now have a way to test cache commands through the entire stack. Eric Blake (24): server: Internal hooks for implementing