Displaying 20 results from an estimated 26 matches for "c_plawre".
2016 Jun 11
4
Early CSE clobbering llvm.assume
Daniel,
Well then my next (dumb?) question is why aren’t we using source level assert information
For optimization ?
--Peter Lawrence.
From: Daniel Berlin [mailto:dberlin at dberlin.org]
Sent: Friday, June 10, 2016 5:39 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] Early CSE clobbering llvm.assume
On Fri, Jun 10, 2016 at 5:34 PM, Lawrence, Peter via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:
My (dumb?) question would be: why is l...
2016 Jul 13
2
IPRA, interprocedural register allocation, question
...addPass(createRegUsageInfoPropPass());
if (UseIPRA)
addPass(createRegUsageInfoCollector());
???
--Peter.
From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com]
Sent: Wednesday, July 13, 2016 4:26 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: vivek pandya <vivekvpandya at gmail.com>; llvm-dev <llvm-dev at lists.llvm.org>; llvm-dev-request at lists.llvm.org; Hal Finkel <hfinkel at anl.gov>
Subject: Re: [llvm-dev] IPRA, interprocedural register allocation, question
On Jul 13, 2016, at 4:24 P...
2016 Jun 11
2
Early CSE clobbering llvm.assume
...Asking “how do I get this intrinsic to work” is perhaps the wrong question,
Perhaps the right question is, how do we represent assume so that we get it for free.
---Peter Lawrence.
From: Daniel Berlin [mailto:dberlin at dberlin.org]
Sent: Friday, June 10, 2016 6:32 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] Early CSE clobbering llvm.assume
We do, implicitly, because assert generates if conditions. Or at least, gvn knows how to propagate that implicit info. We can do better by exposing it more, most likely
On Fri, Jun 10, 2...
2016 Jul 12
3
IPRA, interprocedural register allocation, question
...ve/restore)
“downgrades” means some save regs are converted to scratch
(the callee no longer does save/restore to some registers, and does clobber them)
From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com]
Sent: Monday, July 11, 2016 8:41 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: vivek pandya <vivekvpandya at gmail.com>; llvm-dev <llvm-dev at lists.llvm.org>; llvm-dev-request at lists.llvm.org; Hal Finkel <hfinkel at anl.gov>
Subject: Re: [llvm-dev] IPRA, interprocedural register allocation, question
Sent from my iPhone
On J...
2016 Jul 12
2
IPRA, interprocedural register allocation, question
...) can never be declared “leaf”, and
To get the benefit of IPRA it needs to be within the compilation unit, either
By whole-program compilation or by LTO, if it is used.
--Peter.
From: vivek pandya [mailto:vivekvpandya at gmail.com]
Sent: Friday, July 08, 2016 9:26 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: llvm-dev <llvm-dev at lists.llvm.org>; llvm-dev-request at lists.llvm.org; Hal Finkel <hfinkel at anl.gov>; Tim Amini Golling <mehdi.amini at apple.com>
Subject: Re: Re:[llvm-dev] IPRA, interprocedural register allocation, question
On Sat, Jul 9, 201...
2016 Jul 13
6
IPRA, interprocedural register allocation, question
...Need to use any additional callee-save nor caller-save registers.
Perhaps using some form of __attribute__ ?
Maybe __attribute__ ((registermask = ....)) ?
--Peter Lawrence.
From: vivek pandya [mailto:vivekvpandya at gmail.com]
Sent: Wednesday, July 13, 2016 11:47 AM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: mehdi.amini at apple.com; llvm-dev <llvm-dev at lists.llvm.org>; llvm-dev-request at lists.llvm.org; Hal Finkel <hfinkel at anl.gov>
Subject: Re: [llvm-dev] IPRA, interprocedural register allocation, question
Hello Peter,
Are you still interested in __attri...
2016 Jul 12
3
IPRA, interprocedural register allocation, question
...ming-save changes, I don’t have any data to support the notion,
But it begs to be investigated, unless someone can somehow prove that it can’t help
Performance.
--Peter.
From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com]
Sent: Monday, July 11, 2016 7:06 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: vivek pandya <vivekvpandya at gmail.com>; llvm-dev <llvm-dev at lists.llvm.org>; llvm-dev-request at lists.llvm.org; Hal Finkel <hfinkel at anl.gov>
Subject: Re: [llvm-dev] IPRA, interprocedural register allocation, question
On Jul 11, 2016, at 6:45 P...
2016 May 26
1
dumb question about tblgen
...include can be fixed easily. Tablegen doesn't support
include guards and can only include each file once. Looks like there is a
build step that runs tablegen directly on Intrinsics.td so that file needs
to include ValueTypes.td on its own.
On Wed, May 25, 2016 at 10:20 PM, Lawrence, Peter <c_plawre at qca.qualcomm.com
> wrote:
> Craig,
>
> Ahha, thanks.
>
>
>
> Even with that info I had to resort to “find-grep” to figure out how it
> gets #included,
>
> Being indirectly included from “include/llvm/IR/Intrinsics.td” isn’t
> exactly obvious :=((
&...
2016 Jul 09
3
IPRA, interprocedural register allocation, question
...e,
So what I / we need is another attribute that says this is a leaf function,
At least in my case all I’m really concerned with are leaf functions
Thoughts ?
--Peter Lawrence.
From: vivek pandya [mailto:vivekvpandya at gmail.com]
Sent: Friday, July 08, 2016 10:24 AM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: llvm-dev <llvm-dev at lists.llvm.org>; llvm-dev-request at lists.llvm.org
Subject: Re: Re:[llvm-dev] IPRA, interprocedural register allocation, question
On Fri, Jul 8, 2016 at 1:42 PM, vivek pandya <vivekvpandya at gmail.com<mailto:vivekvpandya at gmail.co...
2016 Jul 12
2
IPRA, interprocedural register allocation, question
...y mind at least, “whole program” means no dynamic libraries, so the only
external functions are simple runtime support, do you have a suggested term for that ?
--Peter.
From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com]
Sent: Tuesday, July 12, 2016 12:31 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: vivek pandya <vivekvpandya at gmail.com>; llvm-dev <llvm-dev at lists.llvm.org>; llvm-dev-request at lists.llvm.org; Hal Finkel <hfinkel at anl.gov>
Subject: Re: [llvm-dev] IPRA, interprocedural register allocation, question
On Jul 12, 2016, at 12:20...
2016 Jun 14
4
Early CSE clobbering llvm.assume
...ust focus on code without asserts and assumes,
I don’t follow your logic, you seem to be implying we don’t optimize property-propagation through “if-then” and “while-do” well ?
--Peter.
From: Hal Finkel [mailto:hfinkel at anl.gov]
Sent: Tuesday, June 14, 2016 11:12 AM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: llvm-dev at lists.llvm.org; Daniel Berlin <dberlin at dberlin.org>
Subject: Re: [llvm-dev] Early CSE clobbering llvm.assume
________________________________
From: "Daniel Berlin via llvm-dev" <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.ll...
2016 Jun 14
3
Early CSE clobbering llvm.assume
On Tue, Jun 14, 2016 at 10:36 AM, Lawrence, Peter <c_plawre at qca.qualcomm.com
> wrote:
> Daniel,
>
> What am I missing in the following chain of logic:
>
>
>
> As far as constant-prop, value-prop, range-prop, and general
> property-propagation,
>
>
>
> 1. the compiler/optimizer **has** to get it right...
2016 May 26
0
dumb question about tblgen
...nt in “MachineValueType.h”,
Would it be possible for someone to add such a complementary comment ?
Thanks,
--Peter Lawrence.
From: Craig Topper [mailto:craig.topper at gmail.com]
Sent: Wednesday, May 25, 2016 9:31 PM
To: Marcello Maggioni <mmaggioni at apple.com>
Cc: Lawrence, Peter <c_plawre at qca.qualcomm.com>; llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] dumb question about tblgen
The i32 class is defined in include/llvm/CodeGen/ValueTypes.td along with a class for every type in MachineValueTypes.h
On Wed, May 25, 2016 at 8:12 PM, Marcello Maggioni via llvm-dev <llvm-d...
2016 May 26
2
dumb question about tblgen
...e definitions have to be in the input source, but I can’t find them…
>
>
> Thanks, Peter Lawrence.
>
>
>
> *From:* Quentin Colombet [mailto:qcolombet at apple.com <qcolombet at apple.com>
> ]
> *Sent:* Wednesday, May 25, 2016 5:25 PM
> *To:* Lawrence, Peter <c_plawre at qca.qualcomm.com>
> *Cc:* llvm-dev at lists.llvm.org
> *Subject:* Re: [llvm-dev] dumb question about tblgen
>
> Hi Peter,
>
> I would recommend looking into the implementation of the matcher if you
> want to add more builtin types:
> utils/TableGen//DAGISelMatcherGen.c...
2016 Jul 08
2
IPRA, interprocedural register allocation, question
On Fri, Jul 8, 2016 at 9:47 AM, Lawrence, Peter <c_plawre at qca.qualcomm.com>
wrote:
> Vivek,
>
> I am looking into these function attributes in the clang docs
>
> Preserve_most
>
> Preserve_all
>
> They are not available in the 3.6.2 that I am currently using, but I hope
> th...
2016 Jul 13
2
IPRA, interprocedural register allocation, question
Mehdi,
I am perusing the 3.8 trunk sources, and don’t find evidence where I
would expect it for LLVM “downgrading” a function’s calling convention.
PrologEpilogEmitter() { “CodeGen/”
...
TFI->determineCalleeSaves() { “Target/XYZ/”
TargetFrameLowering::determineCalleeSaves() { “CodeGen/”
Return <<< some object derived
2016 May 26
3
dumb question about tblgen
...oked,
So the back-end can’t be providing symbol-table init for the front-end,
So the definitions have to be in the input source, but I can’t find them…
Thanks, Peter Lawrence.
From: Quentin Colombet [mailto:qcolombet at apple.com]
Sent: Wednesday, May 25, 2016 5:25 PM
To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
Cc: llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] dumb question about tblgen
Hi Peter,
I would recommend looking into the implementation of the matcher if you want to add more builtin types:
utils/TableGen//DAGISelMatcherGen.cpp
That being said, you can define your o...
2016 Jun 12
2
Early CSE clobbering llvm.assume
...aps the right question is, how do we represent assume so that we get
> it for free.
>
>
> ---Peter Lawrence.
>
>
>
> *From:* Daniel Berlin [mailto:dberlin at dberlin.org <dberlin at dberlin.org>]
> *Sent:* Friday, June 10, 2016 6:32 PM
> *To:* Lawrence, Peter <c_plawre at qca.qualcomm.com>
> *Cc:* llvm-dev at lists.llvm.org
> *Subject:* Re: [llvm-dev] Early CSE clobbering llvm.assume
>
>
> We do, implicitly, because assert generates if conditions. Or at least,
> gvn knows how to propagate that implicit info. We can do better by exposing
>...
2016 May 26
0
dumb question about tblgen
...it for the front-end,
> So the definitions have to be in the input source, but I can’t find them…
>
>
> Thanks, Peter Lawrence.
>
>
>
> From: Quentin Colombet [mailto:qcolombet at apple.com]
> Sent: Wednesday, May 25, 2016 5:25 PM
> To: Lawrence, Peter <c_plawre at qca.qualcomm.com>
> Cc: llvm-dev at lists.llvm.org
> Subject: Re: [llvm-dev] dumb question about tblgen
>
> Hi Peter,
>
> I would recommend looking into the implementation of the matcher if you want to add more builtin types:
> utils/TableGen//DAGISelMatcherGen.cpp
&g...
2016 Jun 14
4
Early CSE clobbering llvm.assume
>
>
>> Sanjoy’s argument is faulty, if it were true we would also find our
>> handling of “assert” to be unacceptable
>>
>> but this is not the case, no one is arguing that we need to re-design
>> “assert”
>>
> Sure, but no one should make this argument anyway: assert is not for
> optimization. In fact, we don't really want it to be used for