Displaying 2 results from an estimated 2 matches for "c9df9473".
2013 Oct 26
0
[LLVMdev] Bug #16941
...XT canonicalization reverted the code pattern that ISPC generated.
>
> Thanks,
> Nadav
>
> <v4.ll><v8.ll><v16.ll>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131025/c9df9473/attachment.html>
2013 Oct 25
2
[LLVMdev] Bug #16941
Nadav,
The problem appears only for vectors longer than available hardware
register (in doubleword elements, i.e. more than 4 on SSE4 and more than 8
on AVX). Select does weird thing. <8 x i1> mask comes as two XMM registers,
select converts them to a single XMM registers (i.e. 8 x 16 bit),
immediately after it converts back to two XMM registers and does blend.
Conversion forth and back has