Displaying 2 results from an estimated 2 matches for "c9d21ed6".
2007 Jun 06
0
[LLVMdev] Register based vector insert/extract
Hi Christopher,
I can send you what I have for that so far, that works pretty well.
Nate
On Jun 6, 2007, at 3:06 PM, Christopher Lamb wrote:
>
> On Apr 24, 2007, at 12:01 PM, Chris Lattner wrote:
>
>> Yes, we need those. I think these are the major pieces needed.
>> These are
>> all relatively small and independent pieces, so we can tackle
>> these one at
2007 Jun 06
2
[LLVMdev] Register based vector insert/extract
On Apr 24, 2007, at 12:01 PM, Chris Lattner wrote:
> Yes, we need those. I think these are the major pieces needed.
> These are
> all relatively small and independent pieces, so we can tackle these
> one at
> a time.
<snip>
> 4. The DAG scheduler pass (which creates machine instrs from dag
> nodes)
> currently thinks of register operands as simple