Displaying 1 result from an estimated 1 matches for "c77df91b".
2014 Jan 09
2
[LLVMdev] basic block missing after MachineInstr packetizing
Sergei, Thank you for your attention.
My target is a custom VLIW DSP. I am not sure dependency dag is correct
when it gets scheduled and packetized. Months ago, I submitted a bug at
http://llvm.org/bugs/show_bug.cgi?id=17894 which explained more details.
I am not sure my understanding of this bug is proper, but modified my local
codes this way and it works for my target when scheduling and