search for: c67x

Hi, Are there any LLVM back-ends for high-performance floating point DSP processors? E.g. TI C67x? Can you share some insights about developing it with LLVM? Any bottlenecks of current infrastructure, complexity estimation? Thanks, Sergey Yakoushkin, RWTH Aachen University

On Thu, 2010-08-12 at 12:03 +0200, Jeremy Morse wrote: > Hi, > > Over the past few months I've been developing a LLVM backend for TIs > C64X family of DSPs. It can be found as a co-processor in a variety of > OMAP-based devices Interesting! > The code itself can be found in the git repo at [2] and is based on LLVM > 2.7. (Binutils is at [3]). Are you intending to

...SPs like the 5x, 54x, 55x, etc. have had "EXP" and "NORM" instructions which could loosely be thought of as helping implement floating point - is this what he meant? Beware of Marketing guys. They quote memory in bits instead of bytes and words. They probably also told you the C67x was 8 * Clock rate MIPS. On 55x you still require a good number of cycles to implement an IEEE floating point multiply. Download the free evaluation tools for the 55x from TI and look at their floating point multiply in the supplied library to get an idea (file = rts.src) . I guess if you are on...

> 3. I'm interested in the methodology for creating a fixed point > implementation and guaging how "good" it is relative to the floating > point golden standard My methodology at this stage is to get it working on the floating point DSP first and to gain recent experience in both Speex and the TI DSP range while I do so. Then I'll enter into serious discussions about

Hi, Over the past few months I've been developing a LLVM backend for TIs C64X family of DSPs. It can be found as a co-processor in a variety of OMAP-based devices such as gumstix, beagleboard and even Nokia's N900 phone. A project I'm working on [0] has had need to put code on it, and we wanted to avoid TIs proprietary compiler. The DSP itself is a VLIW machine, with 64 32-bit