Displaying 7 results from an estimated 7 matches for "c306835".
2017 Apr 10
0
[PATCH 11/11] nvkm/bios/perf: Retreive pointer to unk1c script
...-40,4 +40,5 @@ struct nvbios_perf_fan {
};
int nvbios_perf_fan_parse(struct nvkm_bios *, struct nvbios_perf_fan *);
+u16 nvbios_perf_script_unk1c(struct nvkm_bios *bios);
#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
index c306835..55c1f36 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
@@ -213,3 +213,17 @@ nvbios_perf_fan_parse(struct nvkm_bios *bios,
return 0;
}
+
+u16
+nvbios_perf_script_unk1c(struct nvkm_bios *bios)
+{
+ struct bit_entry bit_P;
+
+ i...
2017 Apr 10
0
[PATCH 13/13] nvkm/bios/perf: Retreive pointer to unk1c script
...-40,4 +40,5 @@ struct nvbios_perf_fan {
};
int nvbios_perf_fan_parse(struct nvkm_bios *, struct nvbios_perf_fan *);
+u16 nvbios_perf_script_unk1c(struct nvkm_bios *bios);
#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
index c306835..55c1f36 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
@@ -213,3 +213,17 @@ nvbios_perf_fan_parse(struct nvkm_bios *bios,
return 0;
}
+
+u16
+nvbios_perf_script_unk1c(struct nvkm_bios *bios)
+{
+ struct bit_entry bit_P;
+
+ i...
2018 Oct 17
2
[PATCH] drm/nouveau/nvkm: mark expected switch fall-throughs
...1,6 +81,7 @@ nv40_fifo_init(struct nvkm_fifo *base)
case 0x49:
case 0x4b:
nvkm_wr32(device, 0x002230, 0x00000001);
+ /* fall through */
case 0x40:
case 0x41:
case 0x42:
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
index c306835..7112992 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
@@ -135,6 +135,7 @@ nvbios_perfEp(struct nvkm_bios *bios, int idx,
break;
case 0x30:
info->script = nvbios_rd16(bios, perf + 0x02);
+ /* fall through */
case 0...
2018 Jun 27
0
[PATCH] drm/nouveau/nvkm: mark expected switch fall-throughs
...1,6 +81,7 @@ nv40_fifo_init(struct nvkm_fifo *base)
case 0x49:
case 0x4b:
nvkm_wr32(device, 0x002230, 0x00000001);
+ /* fall through */
case 0x40:
case 0x41:
case 0x42:
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
index c306835..7112992 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
@@ -135,6 +135,7 @@ nvbios_perfEp(struct nvkm_bios *bios, int idx,
break;
case 0x30:
info->script = nvbios_rd16(bios, perf + 0x02);
+ /* fall through */
case 0...
2019 Jan 10
0
[PATCH] drm/nouveau/nvkm: mark expected switch fall-throughs
...> case 0x49:
> case 0x4b:
> nvkm_wr32(device, 0x002230, 0x00000001);
> + /* fall through */
> case 0x40:
> case 0x41:
> case 0x42:
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
> index c306835..7112992 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
> @@ -135,6 +135,7 @@ nvbios_perfEp(struct nvkm_bios *bios, int idx,
> break;
> case 0x30:
> info->script = nvbios_rd16(bios, perf + 0x02...
2017 Apr 10
14
RESEND Preparations for Fermi DRAM clock changes
Two patches went missing as a result of PEBCAK. No v2 marks as nothing
changed really. Just resending for easier enforcement of patch order
in other people's trees. Sorry for the noise.
Original message:
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern upload routines from GK104+ now shared with GT215+
- Timing calculation for Fermi
- GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that
pesky GT 240.
- A routine to translate a VBIOS init