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Hi. I am searching for hints, documents, or a discussion for how to properly model registers. As an experiment to learn llvm I am trying to do a M68k backend by following and modifying the Cpu0 tutorial by Chem Chung-Shu and Anoushe Jamshidi. The M68k registers are 32bit and comes in two classes data (d0-d7) and address (a0-a7). Similar to X86 target a subset of the registers can be accessed