Displaying 2 results from an estimated 2 matches for "c0edcf19".
2015 Dec 21
2
get instruction destination register
...dest reg or branch
> instruction.
>
> That's why you should check isDef for the ones you're after.
>
> Cheers.
>
> Tim.
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151221/c0edcf19/attachment.html>
2015 Dec 19
2
get instruction destination register
Hello everyone,
I am trying to write a code to do the following:
1. Get an ARM machine instruction
2. Find destination register of that instruction that has been written
3. set a bit in a vector, according to that register number. (Since it's
ARM, I have a 15 bit vector)
It means if I have :
add r0, r1, r0
I want to get r0 as dest reg and set the index 0 of my vector to 1.
I get my machine