Displaying 4 results from an estimated 4 matches for "c028b8e6".
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c028b8e3
2007 Apr 18
0
[PATCH 1/12] gdt-tss-redundant
...c028b8db: c6 42 05 89 movb $0x89,0x5(%edx)
=> ((char *)%edx)[5] = 0x89
(equivalent) ((char *)per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS])[5] = 0x89
c028b8df: c6 42 06 00 movb $0x0,0x6(%edx)
c028b8e3: 88 7a 07 mov %bh,0x7(%edx)
c028b8e6: c1 cb 10 ror $0x10,%ebx
=> other bits
Commented disassembly, line 2:
c028b8e9: 8b 14 86 mov (%esi,%eax,4),%edx
c028b8ec: 8d 04 3a lea (%edx,%edi,1),%eax
=> %eax = per_cpu(cpu_gdt_table, cpu)
c028b8ef: 81 a...
2007 Apr 18
0
[PATCH 1/12] gdt-tss-redundant
...c028b8db: c6 42 05 89 movb $0x89,0x5(%edx)
=> ((char *)%edx)[5] = 0x89
(equivalent) ((char *)per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS])[5] = 0x89
c028b8df: c6 42 06 00 movb $0x0,0x6(%edx)
c028b8e3: 88 7a 07 mov %bh,0x7(%edx)
c028b8e6: c1 cb 10 ror $0x10,%ebx
=> other bits
Commented disassembly, line 2:
c028b8e9: 8b 14 86 mov (%esi,%eax,4),%edx
c028b8ec: 8d 04 3a lea (%edx,%edi,1),%eax
=> %eax = per_cpu(cpu_gdt_table, cpu)
c028b8ef: 81 a...
2007 Apr 18
3
[PATCH] abstract out bits of ldt.c
Chris Wright wrote:
>* Zachary Amsden (zach@vmware.com) wrote:
>
>
>>Does Xen assume page aligned descriptor tables? I assume from this
>>
>>
>
>Yes.
>
>
>
>>patch and snippets I have gathered from others, that is a yes, and other
>>things here imply that DT pages are not shadowed. If so, Xen itself
>>must have live segments
2007 Apr 18
3
[PATCH] abstract out bits of ldt.c
Chris Wright wrote:
>* Zachary Amsden (zach@vmware.com) wrote:
>
>
>>Does Xen assume page aligned descriptor tables? I assume from this
>>
>>
>
>Yes.
>
>
>
>>patch and snippets I have gathered from others, that is a yes, and other
>>things here imply that DT pages are not shadowed. If so, Xen itself
>>must have live segments