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2019 Jun 25
2
x86 instructions EFLAGS in TableGen
Hello,
Here is one question regarding the LLVM TableGen:
Which file in the llvm/lib/Target/X86 folder describes how the bits in
the EFLAGS register are modified by the x86 instructions? For example,
in the "X86InstrInfo.td" file, lines 2134-2135, it says:
let SchedRW = [WriteALU], Defs = [EFLAGS], Uses = [EFLAGS] in {
def CLC : I<0xF8, RawFrm, (outs), (ins), "clc",