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Hi Andrew, I seem to be making good progress on the P5600 scheduler using the new machine model but I've got a few questions about it. How would you represent an instruction that splits into two micro-ops and is dispatched to two different reservation stations? For example, I have two reservation stations (AGQ and FPQ). An FPU load instruction is split into a load micro-op which is

...s to be used // serially, rather than multiple parallel uses. This is important for // in-order machine where the resource consumption is a hazard. But we could do also add a delay to the resource cycles when the the processor resource is unbuffered. - The code in SchedBoundary::bumpNode and SchedBoundary::checkHazard needs to be updated to increment the cycle accounting for DelayCycles. -Andy -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140128/76c69b5b/attachment.html> ------------...