Displaying 2 results from an estimated 2 matches for "buffer_atomic_cmpswap".
2016 Mar 28
0
RFC: atomic operations on SI+
...7bb8ca 100644
> --- a/lib/Target/AMDGPU/SIInstructions.td
> +++ b/lib/Target/AMDGPU/SIInstructions.td
> @@ -1012,7 +1012,7 @@ defm BUFFER_ATOMIC_SWAP : MUBUF_Atomic <
> mubuf<0x30, 0x40>, "buffer_atomic_swap", VGPR_32, i32, atomic_swap_global
> >;
> defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Atomic <
> - mubuf<0x31, 0x41>, "buffer_atomic_cmpswap", VReg_64, v2i32, null_frag
> + mubuf<0x31, 0x41>, "buffer_atomic_cmpswap", VReg_64, v2i32, SIcmp_swap
> >;
> defm BUFFER_ATOMIC_ADD : MUBUF_Atomic <
> mubuf<0x32, 0x42&g...
2016 Mar 25
2
RFC: atomic operations on SI+
Hi Tom, Matt,
I'm working on a project that needs few coherent atomic operations (HSA
mode: load, store, compare-and-swap) for std::atomic_uint in HCC.
the attached patch implements atomic compare and swap for SI+
(untested). I tried to stay within what was available, but there are
few issues that I was unsure how to address:
1.) it currently uses v2i32 for both input and output. This