Displaying 15 results from an estimated 15 matches for "bufctx_3d".
2013 Dec 02
0
[PATCH] nv50: Fix GPU_READING/WRITING bit removal
...>base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
- mt->base.status &= NOUVEAU_BUFFER_STATUS_GPU_READING;
+ mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING;
/* only register for writing, otherwise we'd always serialize here */
BCTX_REFN(nv50->bufctx_3d, FB, &mt->base, WR);
@@ -91,7 +91,7 @@ nv50_validate_fb(struct nv50_context *nv50)
if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
nv50->state.rt_serialize = TRUE;
mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
- mt->base.status &a...
2014 Nov 19
5
[PATCH v2 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2014 Jun 17
0
[PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...goto out_err;
+
+ nouveau_bo_map(nv50->fence.bo, NOUVEAU_BO_RD, screen->base.client);
+ nv50->fence.map = (u32 *)((char *)nv50->fence.bo->map + nv50->fence.ofs);
+
ret = nouveau_bufctx_new(screen->base.client, NV50_BIND_COUNT,
&nv50->bufctx_3d);
if (!ret)
@@ -250,6 +320,14 @@ nv50_create(struct pipe_screen *pscreen, void *priv)
if (ret)
goto out_err;
+ nouveau_fence_new(&nv50->base.fence, &nv50->base.fence.current, FALSE);
+
+ if (!screen->cur_ctx) {
+ nv50_screen_init_hwctx(screen, nv50->bas...
2014 Nov 19
0
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
.../nouveau/nvc0/nvc0_context.c
@@ -322,7 +322,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv)
/* add permanently resident buffers to bufctxts */
- flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
+ flags = NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD;
BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->text);
BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->uniform_bo);
@@ -333,7 +333,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv)
BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->parm);
}
- flags = NOUVEAU_BO_VRAM | NO...
2014 Jun 17
2
[PATCH try 2 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
...bo.c
@@ -737,7 +737,7 @@ nv50_draw_vbo_kick_notify(struct nouveau_pushbuf *chan)
{
struct nv50_screen *screen = chan->user_priv;
- nouveau_fence_update(&screen->base, TRUE);
+ nouveau_fence_update(&screen->base.fence, TRUE);
nv50_bufctx_fence(screen->cur_ctx->bufctx_3d, TRUE);
}
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
index e5040c4..52f8a57 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
@@ -147,8 +147,8 @@ nvc0_default_kick_n...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...322,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv)
>
> /* add permanently resident buffers to bufctxts */
>
> - flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
> + flags = NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD;
>
> BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->text);
> BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->uniform_bo);
> @@ -333,7 +333,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv)
> BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->parm);
> }
>
>...
2014 Jun 21
3
[Mesa-dev] [PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...nouveau_bo_map(nv50->fence.bo, NOUVEAU_BO_RD, screen->base.client);
> + nv50->fence.map = (u32 *)((char *)nv50->fence.bo->map + nv50->fence.ofs);
> +
> ret = nouveau_bufctx_new(screen->base.client, NV50_BIND_COUNT,
> &nv50->bufctx_3d);
> if (!ret)
> @@ -250,6 +320,14 @@ nv50_create(struct pipe_screen *pscreen, void *priv)
> if (ret)
> goto out_err;
>
> + nouveau_fence_new(&nv50->base.fence, &nv50->base.fence.current, FALSE);
> +
> + if (!screen->cur_ctx) {
> +...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...@@ -322,7 +322,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv)
>
> /* add permanently resident buffers to bufctxts */
>
> - flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
> + flags = NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD;
>
> BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->text);
> BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->uniform_bo);
> @@ -333,7 +333,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv)
> BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->parm);
> }
>
> -...
2014 Jun 16
2
[PATCH 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
...@@ -737,7 +737,7 @@ nv50_draw_vbo_kick_notify(struct nouveau_pushbuf *chan)
{
struct nv50_screen *screen = chan->user_priv;
- nouveau_fence_update(&screen->base, TRUE);
+ nouveau_fence_update(&screen->base.fence, TRUE);
nv50_bufctx_fence(screen->cur_ctx->bufctx_3d, TRUE);
}
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
index e5040c4..52f8a57 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
@@ -147,8 +147,8 @@ nvc0_default_kick_...
2014 Oct 27
4
[PATCH 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2015 Jun 19
5
[PATCH v3 0/2] nouveau: support for custom VRAM domains
New revision of this patchset that prevents VRAM objects from being
allocated on VRAM-less systems like Tegra. This is required for Mesa
to work on such systems.
Changes since v2:
- Use vram_size to detect systems without VRAM and set the correct
domain instead of expecting each chip to set its domain explicitly.
Alexandre Courbot (2):
nouveau: support for custom VRAM domains
nvc0: use
2016 Jun 05
0
[RFC PATCH] nouveau: add locking
...-391,9 +399,12 @@ nv50_create(struct pipe_screen *pscreen, void *priv, unsigned ctxflags)
util_dynarray_init(&nv50->global_residents);
+ pipe_mutex_unlock(screen->base.push_mutex);
+
return pipe;
out_err:
+ pipe_mutex_unlock(screen->base.push_mutex);
if (nv50->bufctx_3d)
nouveau_bufctx_del(&nv50->bufctx_3d);
if (nv50->bufctx_cp)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.h b/src/gallium/drivers/nouveau/nv50/nv50_context.h
index 2317fa2..b7963a4 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.h
+++ b/src/gallium/drive...
2014 Nov 16
1
[PATCH 1/2] nv50, nvc0: actually check constbufs for invalidation
The number of vertex buffers has nothing to do with the number of bound
constbufs.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.4 10.3" <mesa-stable at lists.freedesktop.org>
---
src/gallium/drivers/nouveau/nv50/nv50_context.c | 5 +++--
src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 4 +++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git
2015 Nov 19
7
[Bug 93004] New: Guild Wars 2 crash on nouveau DX11 cards
https://bugs.freedesktop.org/show_bug.cgi?id=93004
Bug ID: 93004
Summary: Guild Wars 2 crash on nouveau DX11 cards
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/DRI/nouveau
Assignee: nouveau at
2014 May 20
14
[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine
I went through the gallium-nine tree and picked out nouveau patches that are
general bug-fixes. The first bunch I'd like to also get into 10.2. I've
reviewed all of them and they make sense to me, but sending them out for
public review as well in case there are any objections.
Unless I hear objections, I'd like to push this by Friday.
Christoph Bumiller (11):
nv50,nvc0: always pull