search for: bucket_size

As it turns out, with the proprietary firmware, the VP3 and VP4 interfaces are identical. Furthermore, this is all already implemented for nvc0. So these patches (a) move the easily sharable bits of the nvc0 implementation into the nouveau directory, and then (b) implement the other parts in nv50. The non-shared parts are still largely copies, but there are some differences, not the least of which

Create the ref_bo without any storage type flags set for now. The issue probably arises from our use of the additional buffer space at the end of the ref_bo. It should probably be split up in the future. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Tested-by: Martin Peres <martin.peres at labri.fr> Cc: "10.0" <mesa-stable at lists.freedesktop.org> ---

...> Thanks, > Ben > > struct h264_picparm_vp { // 700..a00 > uint16_t width, height; > uint32_t stride1, stride2; // 04 08 > uint32_t ofs[6]; // 0c..24 in-image offset > > uint32_t u24; // nfi ac8 ? -> ColocBufferSize > uint32_t bucket_size; // 28 bucket size > uint32_t inter_ring_data_size; // 2c > > unsigned f0 : 1; // 0 0x01: into 640 shifted by 3, 540 shifted by 5, half size something? -> MbaffFrameFlag > unsigned f1 : 1; // 1 0x02: into vuc ofs 56 -> direct_8x8_inference_flag >...

...ete (ptr=0x8ab0b18) from /usr/local/lib/R/library/ann/libs/ann.so #3 0x40307b5e in annDeallocPts (pa=@0xbfffd7a0) at ANN.cc:124 #4 0x4030733d in ANN_interface (xp=0x8cd8280, eps=@0x8e2a550, qp=0x8e2a5c8, dnn=0x8d727f0, n_pts=@0x8dc7be8, k=@0x8dc7c08, dim=@0x8dc7c28, q_pts=@0x8dc7c48, bucket_size=@0x8dc7c68, insplit=@0x8dc7c88, inshrink=@0x8dc7ca8, priority=@0x8dc7cc8, maxpts=@0x8dc7ce8, nn=0x8ace0d0) at ANN_interface.cc:133 #5 0x808a557 in do_dotCode (call=0x8a3f098, op=0x81a7a5c, args=0x8a3d388, env=0x8a4326c) at dotcode.c:1310 #6 0x809136f in Rf_eval (e=0x8a3f098, rho=0x8...

On Thu, Nov 21, 2013 at 5:22 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > On Thu, Nov 21, 2013 at 5:07 PM, Benjamin Morris <bmorris at nvidia.com> wrote: >> On 11/19/2013 08:16 PM, Ilia Mirkin wrote: >>> Hello, >>> >>> I hope this is an appropriate style of request for this forum. I added >>> code to support video decoding on the tesla

...ess; you can apply the same logic you already have for G84 to your G98 code path. Thanks, Ben struct h264_picparm_vp { // 700..a00 uint16_t width, height; uint32_t stride1, stride2; // 04 08 uint32_t ofs[6]; // 0c..24 in-image offset uint32_t u24; // nfi ac8 ? -> ColocBufferSize uint32_t bucket_size; // 28 bucket size uint32_t inter_ring_data_size; // 2c unsigned f0 : 1; // 0 0x01: into 640 shifted by 3, 540 shifted by 5, half size something? -> MbaffFrameFlag unsigned f1 : 1; // 1 0x02: into vuc ofs 56 -> direct_8x8_inference_flag unsigned weighted_pred_flag : 1; // 2 0x04 unsigne...