Displaying 3 results from an estimated 3 matches for "btmp3".
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tmp3
2010 Sep 01
0
[LLVMdev] equivalent IR, different asm
...ll' causes a crash to webkit.
> I suspect the usage of registers is wrong, can someone take a look ?
The difference is that there is a shift right after the multiply, before the divide. In IR, the difference is:
%5 = mul nsw i32 %4, %tmp1 ; <i32> [#uses=1]
%btmp3 = lshr i64 %1, 32 ; <i64> [#uses=1]
%btmp4 = trunc i64 %btmp3 to i32 ; <i32> [#uses=1]
%6 = sdiv i32 %5, %btmp4 ; <i32> [#uses=1]
vs:
%5 = mul nsw i32 %4, %tmp1 ; <i32> [#uses=1]...
2010 Sep 01
5
[LLVMdev] equivalent IR, different asm
The attached .ll files seem equivalent, but the resulting asm from 'opt-fail.ll' causes a crash to webkit.
I suspect the usage of registers is wrong, can someone take a look ?
$ llc opt-pass.ll -o -
.section __TEXT,__text,regular,pure_instructions
.globl __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_10StyleImageE
.align 4, 0x90
2010 Sep 01
2
[LLVMdev] equivalent IR, different asm
....
>> I suspect the usage of registers is wrong, can someone take a look ?
>
> The difference is that there is a shift right after the multiply, before the divide. In IR, the difference is:
>
> %5 = mul nsw i32 %4, %tmp1 ; <i32> [#uses=1]
>
> %btmp3 = lshr i64 %1, 32 ; <i64> [#uses=1]
> %btmp4 = trunc i64 %btmp3 to i32 ; <i32> [#uses=1]
>
> %6 = sdiv i32 %5, %btmp4 ; <i32> [#uses=1]
>
> vs:
>
> %5 = mul nsw i32 %4, %tmp1...