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When you compile the attached file using llc -march=x86 -mcpu=atom sched-bug.ll -o - The Post-RA scheduler changes the sequence movl %ecx, (%esp) bsfl (%esp),%eax # this came from inline assembly code to read bsfl (%esp),%eax # this came from inline assembly code movl %ecx, (%esp) This is an incorrect schedule, because it seems the scheduler is not aware that the memory load by the bsfl depends on the memory store by the movl....