Displaying 10 results from an estimated 10 matches for "brlid".
2020 Apr 18
2
Debug symbols are missing in elf
...8: b0000000 imm 0
8: R_MICROBLAZE_64 .rodata.str1.1
c: a0c00000 ori r6, r0, 0
10: f8a10028 swi r5, r1, 40
14: b0000000 imm 0
14: R_MICROBLAZE_64_PCREL printf
18: b9f40000 brlid r15, 0
1c: 10a60000 addk r5, r6, r0
printf("Successfully ran Hello World application");
20: b0000000 imm 0
20: R_MICROBLAZE_64 .rodata.str1.1+0xe
24: a0a00000 ori r5, r0, 0
28: b0000000 imm 0...
2020 Apr 18
2
Debug symbols are missing in elf
...8: R_MICROBLAZE_64 .rodata.str1.1
>> c: a0c00000 ori r6, r0, 0
>> 10: f8a10028 swi r5, r1, 40
>> 14: b0000000 imm 0
>> 14: R_MICROBLAZE_64_PCREL printf
>> 18: b9f40000 brlid r15, 0
>> 1c: 10a60000 addk r5, r6, r0
>> printf("Successfully ran Hello World application");
>> 20: b0000000 imm 0
>> 20: R_MICROBLAZE_64 .rodata.str1.1+0xe
>> 24: a0a00000 ori r5,...
2020 Apr 20
2
Debug symbols are missing in elf
...a.str1.1
>>>> c: a0c00000 ori r6, r0, 0
>>>> 10: f8a10028 swi r5, r1, 40
>>>> 14: b0000000 imm 0
>>>> 14: R_MICROBLAZE_64_PCREL printf
>>>> 18: b9f40000 brlid r15, 0
>>>> 1c: 10a60000 addk r5, r6, r0
>>>> printf("Successfully ran Hello World application");
>>>> 20: b0000000 imm 0
>>>> 20: R_MICROBLAZE_64 .rodata.str1.1+0xe
>>>...
2020 Apr 21
2
Debug symbols are missing in elf
...c00000 ori r6, r0, 0
>> >>>> 10: f8a10028 swi r5, r1, 40
>> >>>> 14: b0000000 imm 0
>> >>>> 14: R_MICROBLAZE_64_PCREL printf
>> >>>> 18: b9f40000 brlid r15, 0
>> >>>> 1c: 10a60000 addk r5, r6, r0
>> >>>> printf("Successfully ran Hello World application");
>> >>>> 20: b0000000 imm 0
>> >>>> 20: R_MICROBLAZE_64...
2011 Sep 26
1
[LLVMdev] distinguishing between real arguments and variable arguments
...neBasicBlock::iterator &instr) {
switch (instr->getOpcode()) {
default: return instr->getNumOperands();
// These instructions have a variable number of operands but the
first two
// are the "real" operands that we care about during hazard detection.
case MBlaze::BRLID:
case MBlaze::BRALID:
case MBlaze::BRLD:
case MBlaze::BRALD:
return 2;
}
}
In Sparc:
void Filler::insertCallUses(MachineBasicBlock::iterator MI,
SmallSet<unsigned, 32>& RegUses)
{
switch(MI->getOpcode()) {
default: llvm_unreachable...
2013 Nov 17
1
[LLVMdev] A question about Greedy Register Allocator's reload instruction.
...tion get a bad SP register value?
Let me use MBlaze to explain that:
compile option: clang -target mblaze -O2 -S -mllvm -unroll-threshold=1024 -mllvm -unroll-allow-partial demo.c -o demo.s -mllvm -print-after-all
The IR after Virtual Register Rewriter whill show this situation as below:
"
BRLID R15, ga at printf, %R3<imp_def,dead>, %R4<imp_def,dead>, %R5<imp_def,dead>...
%R4<def>=LWI <fi#5>,0
ADJCALLSTACKUP 68, 0, %R1 <imp_def>, %R1<imp_def>
"
The instruction " %R4<def>=LWI <fi#5>,0" loads value from the st...
2012 Oct 21
2
[LLVMdev] Need help trying to generate mblaze code.
Hello,
this is a very dump question, I hope to do more valuable question soon, but
for now I'm just trying to run a simple hello world in C for clang and llvm
to the target mblaze, but is not working.
( I need to change the compiler in the next stage)
I past all the weekend tried to run this, and I was unable, I did the build
of llVM/clang, but no bin was generate, only silly folder that I
2017 Feb 25
2
Help understanding and lowering LLVM IDS conditional codes correctly
...C,false);
getFPCCtoMBCC(CC,CondCode);
break;
}
}
I am generating wrong code when using floating point library call for
comparions. For the following simple case:
float branchTest(float a, float b) {
float retVal;
if (a == b) {
retVal = a / b + 22.34;
}
return retVal;
}
I am getting:
brlid r15,__nesf2
nop
beqi r3,.LBB0_2 ; r3 is return regsiter
Now I want to understand difference between three different version of
Condition
Codes for same operation and how according to my target I should handle
them.
For example let's consider SETNE, SETONE and SETUNE so for my architecture
I th...
2017 Mar 09
2
Help understanding and lowering LLVM IDS conditional codes correctly
...; }
>
> I am generating wrong code when using floating point library call for
> comparions. For the following simple case:
> float branchTest(float a, float b) {
> float retVal;
> if (a == b) {
> retVal = a / b + 22.34;
> }
> return retVal;
> }
> I am getting:
> brlid r15,__nesf2
> nop
> beqi r3,.LBB0_2 ; r3 is return regsiter
>
> Now I want to understand difference between three different version of
> Condition
> Codes for same operation and how according to my target I should handle
> them.
> For example let's consider SETNE, SETONE...
2017 Mar 14
2
Help understanding and lowering LLVM IDS conditional codes correctly
...e following simple case:
>> float branchTest(float a, float b) {
>> float retVal;
>> if (a == b) {
>> retVal = a / b + 22.34;
>> }
>> return retVal;
>> }
>> I am getting:
>> brlidr15,__nesf2
>> nop
>> beqir3,.LBB0_2 ; r3 is return regsiter
>>
>> Now I want to understand difference between three different
>> version of Condition
>> Codes for same operation and how according to my target I
>>...