search for: brandner

Reid Spencer wrote: > Have you modified the makefile in any way? Note that sse.expantfft.bc should be sse.expandfft.bc no, did'nt change it. the typo before seems to be an error while copying from the terminal. i've cleaned everything and tried again. this is the messsage: [brandner:/localtmp/brandner/dev/llvm-test:529] make -j1 TEST=nightly 2>&1 | tee report.nightly.raw.out make[1]: Entering directory `/localtmp/brandner/dev/llvm-test/SingleSource' make[2]: Entering directory `/localtmp/brandner/dev/llvm-test/SingleSource/UnitTests' make[3]: Entering directory...

On Fri, 04 May 2007 14:37:53 +0200 Florian Brandner <fbrandne at mail.tuwien.ac.at> wrote: >hello, > >i've problems running the llvm-test suite using debian linux and make >3.81. it works fine on my laptop, running openSuse and make 3.81. > >i already tried to install make 3.75 and 3.79, both did not work. > >the er...

hello, i've problems running the llvm-test suite using debian linux and make 3.81. it works fine on my laptop, running openSuse and make 3.81. i already tried to install make 3.75 and 3.79, both did not work. the error message is: make[1]: *** No rule to make target `Output/sse.expantfft.bc', needed by `Output/sse.expandfft.linked.rbc'. Stop. using make -p, i see that

...tained 6 of them alone. all but 5 of them could be avoided using a simple patch that disables tail duplication of loop headers - 3 of them in one single function. the patch applies and compiles with svn trunk, it also works for the small testcase, but i did not run the testsuites. florian -- Brandner Florian CD Laboratory - Compilation Techniques for Embedded Processors Institut für Computersprachen E185/1 Technische Universität Wien Argentinierstraße 8 / 185 A-1040 Wien, Austria Tel.: (+431) 58801-58521 E-Mail: brandner at complang.tuwien.ac.at -------------- next part -------------- A...

hi, Florian Brandner wrote: > Dan Gohman wrote: >> On Wed, May 23, 2007 at 12:23:38AM -0700, Chris Lattner wrote: >>> Right. The original Value*'s are preserved in the DAG, but dropped when >>> MachineInstrs are created. We could add a machineoperand to capture this >>> Value...

Hello everybody, we noticed that llvmgcc4.2-2.2 sometimes generates non-natural loops when compiling to bytecode without any optimizations. Apparently what happens is that the loop header is duplicated, which results in two entry points for the loop. Since this could obstruct subsequent loop optimizations, it might be interesting to further investigate this behavior. To show the problem, I have

On Jun 11, 2008, at 6:27 AM, Florian Brandner wrote: > On Thursday 08 May 2008 18:33:48 Adrian Prantl wrote: >> we noticed that llvmgcc4.2-2.2 sometimes generates non-natural loops >> when compiling to bytecode without any optimizations. Apparently what >> happens is that the loop header is duplicated, which results in tw...

...eg node (for the return) and the INLINEASM node. the INLINEASM node uses the constant as a flag indicating that an immediate operand (5 in this case) follows. the instruction selector rewrites the constant node into a MOV32ri. which causes the scheduler to crash with the following error message: [brandner:~/tmp:720] /raid0/brandner/llvm-2.0/llvm-gcc4-2.0-x86-linux-RHEL4/bin/llvm-gcc -c test.c -O1 cc1: /mounts/zion/disks/0/localhome/tbrethou/llvm/include/llvm/Support/Casting.h:199: typename llvm::cast_retty<To, From>::ret_type llvm::cast(const Y&) [with X = llvm::ConstantSDNode, Y = llvm::S...

...ow much has to be done to integrate this with the other, e.g., the x86, targets. does any of the other targets rewrite loads/stores during lowering? any comments how to integrate this into llvm, and how to proceed to get the alias analysis working after the codegen prepare pass? florian Florian Brandner wrote: > hi, > > > Florian Brandner wrote: >> Dan Gohman wrote: >>> On Wed, May 23, 2007 at 12:23:38AM -0700, Chris Lattner wrote: >>>> Right. The original Value*'s are preserved in the DAG, but dropped when >>>> MachineInstrs are created....

...akes the struct field for the completion proc an an anonymous aggregate pointer. Is that better than making the first parameter to MyCompletionProc void* or something similar? > > I guess there's no way in LLVM IR to forward-declare in a way that solves this, huh? > > -- Florian Brandner Embedded Systems Engineering Group Department of Applied Mathematics and Computer Science Technical University of Denmark Richard Petersens Plads Building 322, room 206 2800 Lyngby Denmark phone: +45 45255223 web: http://www.imm.dtu.dk/~flbr/ email: flbr at imm.dtu.dk

...tion is that if one were to decorate MachineInstr's >> with the LLVM level pointer values that they use for reading >> and writing memory, > > this is already the case: SrcValue and SVOffset. Ah, that's right. I went back and read the discussion from January, and Florian Brandner explains there that the real culprit is the lowering of GEP in the codegen prepare pass. Florian, if you have worked more on this, we would be very interested in your work. Serialization caused by memory references is a big obstacle for us at the moment. -- Pertti

On Fri, Jun 15, 2007 at 04:16:57PM +0200, Florian Brandner wrote: > hi, > > > Florian Brandner wrote: > > Dan Gohman wrote: > >> On Wed, May 23, 2007 at 12:23:38AM -0700, Chris Lattner wrote: > >>> Right. The original Value*'s are preserved in the DAG, but dropped when > >>> MachineInstrs are creat...

On Wed, May 23, 2007 at 12:23:38AM -0700, Chris Lattner wrote: > On Fri, 4 May 2007, Florian Brandner wrote: > > i had a look at the SelectionDAG based schedulers. it seems that > > aliasing loads/stores are chained together by the DAGCombiner. after > > scheduling, when the MachineInstrs are created, the alias information > > cannot be used anymore in the current framework....

On Wednesday 14 January 2009 18:59:03 Brandner Florian wrote: > I have a patch against llvm 2.4 that fixes this issue, but did not have > the time to post the patch here. I'll do so by tomorrow. here is the patch, still against llvm 2.4. I had a short look on trunk, but it seems that there are several conflicts. Maybe a tablgen expe...

For the following code: struct XBeePacket; typedef void (*CompletionProc)(XBeePacket* inPacket, void* inParam2); struct XBeePacket { bool mField1; CompletionProc mCompletionProc; }; Why does clang emit this IR? %struct.XBeePacket = type { i8, {}* } define void @MyCompletionProc(%struct.XBeePacket* %inPacket, i8*

Hi Quentin, > On 22 Jan 2016, at 15:16, Quentin Colombet <qcolombet at apple.com> wrote: > 1. If anyone else is interested for such concept? yes, we are! (https://github.com/t-crest) > 2. What kind of information should we make accessible in an hypothetical MachineModule? I.e., how do you plan to use the MachineModulePass so that we make the right design decisions for the

...lying on LoopInfo to provide loop information for all loops, but it is missing these loops. Is there any work in the pipeline that aims to fix this? Many thanks, Marc On Sat, Jun 21, 2008 at 2:09 PM, Chris Lattner <sabre at nondot.org> wrote: > > On Jun 11, 2008, at 6:27 AM, Florian Brandner wrote: > > > On Thursday 08 May 2008 18:33:48 Adrian Prantl wrote: > >> we noticed that llvmgcc4.2-2.2 sometimes generates non-natural loops > >> when compiling to bytecode without any optimizations. Apparently what > >> happens is that the loop header is duplica...

...int operations using library calls. so there might be some extra work needed to get this infrastructure too. I have not yet worked on this yet, but I plan to implement something like this at some point sooner or later. if you find another (better) solution let me know. best, Florian -- Florian Brandner Embedded Systems Engineering Group Department of Informatics and Mathematical Modeling DTU Informatics Technical University of Denmark Richard Petersens Plads Building 322, room 206 2800 Lyngby Denmark phone: +45 45255223 web: http://www.imm.dtu.dk/~flbr/ email: flbr at imm.dtu.dk

Hi all, I'm new to the project and will probably ask quite a few obvious questions, so please, bare with me. I'm trying to get my bearings straight as to the general path forward for producing a backend for a custom DSP processor. Currently, I have a port of binutils and a basic simulator (based on SID). I want to make it easier for software engineers to produce code for this

Hi all, I am trying to build a global control flow graph at machine code level. Essentially, I need the handles to the MachineFunction's corresponding to every call site inside a MachineFunction in order to get the handles to MachineBasicBlock's with return statements inside the callee. Currently, the codegen module processes one MachineFunction at a time and hence I can't find a way