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2012 Jan 18
1
[LLVMdev] Pattern matching in a SelectionDAG
...backend using LLVM's retargetable code
generator, and I'm confused about how the SelectionDAG works. Let me give
you an example from the SPARC backend (as this is what is often mentioned
in the documentation). This is how the "branch always" instruction is
defined:
def BA : BranchSP<0b1000, (ins brtarget:$dst),
"ba $dst",
[(br bb:$dst)]>;
The pattern that is to be matched is simply (br bb: $dst). Based on this, I
would have expected the pattern for an add instruction to look somehow like
this: (add IntRegs:$b, IntR...